2014-07-26 13:17:09 -04:00
|
|
|
// Copyright 2014 Citra Emulator Project
|
2014-12-17 00:38:14 -05:00
|
|
|
// Licensed under GPLv2 or any later version
|
2014-07-26 13:17:09 -04:00
|
|
|
// Refer to the license.txt file included.
|
|
|
|
|
2014-12-07 16:22:04 -05:00
|
|
|
#include <common/file_util.h>
|
|
|
|
|
2014-12-15 18:32:49 -05:00
|
|
|
#include <nihstro/shader_bytecode.h>
|
|
|
|
|
2015-07-21 19:09:11 -04:00
|
|
|
#include "video_core/pica.h"
|
2015-07-21 19:38:59 -04:00
|
|
|
|
|
|
|
#include "shader.h"
|
|
|
|
#include "shader_interpreter.h"
|
2014-07-26 13:17:09 -04:00
|
|
|
|
2015-03-08 16:52:38 -04:00
|
|
|
using nihstro::OpCode;
|
2014-12-15 18:32:49 -05:00
|
|
|
using nihstro::Instruction;
|
|
|
|
using nihstro::RegisterType;
|
|
|
|
using nihstro::SourceRegister;
|
|
|
|
using nihstro::SwizzlePattern;
|
|
|
|
|
2014-07-26 13:17:09 -04:00
|
|
|
namespace Pica {
|
|
|
|
|
2015-07-21 19:04:05 -04:00
|
|
|
namespace Shader {
|
2014-07-26 13:17:09 -04:00
|
|
|
|
2015-07-21 19:38:59 -04:00
|
|
|
void RunInterpreter(UnitState& state) {
|
2015-05-13 23:29:27 -04:00
|
|
|
const auto& uniforms = g_state.vs.uniforms;
|
|
|
|
const auto& swizzle_data = g_state.vs.swizzle_data;
|
|
|
|
const auto& program_code = g_state.vs.program_code;
|
2014-12-19 13:58:21 -05:00
|
|
|
|
|
|
|
// Placeholder for invalid inputs
|
|
|
|
static float24 dummy_vec4_float24[4];
|
|
|
|
|
2014-07-26 13:17:09 -04:00
|
|
|
while (true) {
|
2014-12-13 15:30:13 -05:00
|
|
|
if (!state.call_stack.empty()) {
|
2015-07-26 06:27:36 -04:00
|
|
|
auto& top = state.call_stack.back();
|
2015-07-26 06:40:34 -04:00
|
|
|
if (state.program_counter == top.final_address) {
|
2014-12-20 21:01:35 -05:00
|
|
|
state.address_registers[2] += top.loop_increment;
|
|
|
|
|
|
|
|
if (top.repeat_counter-- == 0) {
|
2015-07-26 06:40:34 -04:00
|
|
|
state.program_counter = top.return_address;
|
2015-07-26 06:27:36 -04:00
|
|
|
state.call_stack.pop_back();
|
2015-02-21 12:52:21 -05:00
|
|
|
} else {
|
2015-07-26 06:40:34 -04:00
|
|
|
state.program_counter = top.loop_address;
|
2014-12-20 21:01:35 -05:00
|
|
|
}
|
2014-12-13 15:30:13 -05:00
|
|
|
|
|
|
|
// TODO: Is "trying again" accurate to hardware?
|
|
|
|
continue;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2014-07-26 13:17:09 -04:00
|
|
|
bool exit_loop = false;
|
2015-07-26 06:40:34 -04:00
|
|
|
const Instruction instr = { program_code[state.program_counter] };
|
|
|
|
const SwizzlePattern swizzle = { swizzle_data[instr.common.operand_desc_id] };
|
2014-12-12 12:31:37 -05:00
|
|
|
|
2015-07-21 19:38:59 -04:00
|
|
|
static auto call = [](UnitState& state, u32 offset, u32 num_instructions,
|
2014-12-20 21:01:35 -05:00
|
|
|
u32 return_offset, u8 repeat_count, u8 loop_increment) {
|
2015-07-26 06:40:34 -04:00
|
|
|
state.program_counter = offset - 1; // -1 to make sure when incrementing the PC we end up at the correct offset
|
2015-07-26 06:27:36 -04:00
|
|
|
ASSERT(state.call_stack.size() < state.call_stack.capacity());
|
|
|
|
state.call_stack.push_back({ offset + num_instructions, return_offset, repeat_count, loop_increment, offset });
|
2014-12-13 15:30:13 -05:00
|
|
|
};
|
2015-07-26 06:40:34 -04:00
|
|
|
state.debug.max_offset = std::max<u32>(state.debug.max_offset, 1 + state.program_counter);
|
2014-07-26 13:17:09 -04:00
|
|
|
|
2014-12-15 18:32:49 -05:00
|
|
|
auto LookupSourceRegister = [&](const SourceRegister& source_reg) -> const float24* {
|
|
|
|
switch (source_reg.GetRegisterType()) {
|
|
|
|
case RegisterType::Input:
|
2015-07-21 19:38:59 -04:00
|
|
|
return &state.input_registers[source_reg.GetIndex()].x;
|
2014-12-15 18:32:49 -05:00
|
|
|
|
|
|
|
case RegisterType::Temporary:
|
|
|
|
return &state.temporary_registers[source_reg.GetIndex()].x;
|
|
|
|
|
|
|
|
case RegisterType::FloatUniform:
|
2015-05-13 23:29:27 -04:00
|
|
|
return &uniforms.f[source_reg.GetIndex()].x;
|
2014-12-19 13:58:21 -05:00
|
|
|
|
|
|
|
default:
|
|
|
|
return dummy_vec4_float24;
|
2014-12-15 18:32:49 -05:00
|
|
|
}
|
|
|
|
};
|
2014-07-26 13:17:09 -04:00
|
|
|
|
2015-03-08 16:52:38 -04:00
|
|
|
switch (instr.opcode.Value().GetInfo().type) {
|
|
|
|
case OpCode::Type::Arithmetic:
|
2014-12-12 12:31:37 -05:00
|
|
|
{
|
2015-05-24 10:27:31 -04:00
|
|
|
const bool is_inverted = (0 != (instr.opcode.Value().GetInfo().subtype & OpCode::Info::SrcInversed));
|
2014-12-12 16:50:09 -05:00
|
|
|
|
|
|
|
const int address_offset = (instr.common.address_register_index == 0)
|
|
|
|
? 0 : state.address_registers[instr.common.address_register_index - 1];
|
|
|
|
|
2015-05-24 10:27:31 -04:00
|
|
|
const float24* src1_ = LookupSourceRegister(instr.common.GetSrc1(is_inverted) + (!is_inverted * address_offset));
|
|
|
|
const float24* src2_ = LookupSourceRegister(instr.common.GetSrc2(is_inverted) + ( is_inverted * address_offset));
|
2014-12-12 12:31:37 -05:00
|
|
|
|
2014-12-21 12:34:20 -05:00
|
|
|
const bool negate_src1 = ((bool)swizzle.negate_src1 != false);
|
|
|
|
const bool negate_src2 = ((bool)swizzle.negate_src2 != false);
|
2014-12-12 12:31:37 -05:00
|
|
|
|
|
|
|
float24 src1[4] = {
|
|
|
|
src1_[(int)swizzle.GetSelectorSrc1(0)],
|
|
|
|
src1_[(int)swizzle.GetSelectorSrc1(1)],
|
|
|
|
src1_[(int)swizzle.GetSelectorSrc1(2)],
|
|
|
|
src1_[(int)swizzle.GetSelectorSrc1(3)],
|
|
|
|
};
|
|
|
|
if (negate_src1) {
|
|
|
|
src1[0] = src1[0] * float24::FromFloat32(-1);
|
|
|
|
src1[1] = src1[1] * float24::FromFloat32(-1);
|
|
|
|
src1[2] = src1[2] * float24::FromFloat32(-1);
|
|
|
|
src1[3] = src1[3] * float24::FromFloat32(-1);
|
|
|
|
}
|
|
|
|
float24 src2[4] = {
|
|
|
|
src2_[(int)swizzle.GetSelectorSrc2(0)],
|
|
|
|
src2_[(int)swizzle.GetSelectorSrc2(1)],
|
|
|
|
src2_[(int)swizzle.GetSelectorSrc2(2)],
|
|
|
|
src2_[(int)swizzle.GetSelectorSrc2(3)],
|
|
|
|
};
|
|
|
|
if (negate_src2) {
|
|
|
|
src2[0] = src2[0] * float24::FromFloat32(-1);
|
|
|
|
src2[1] = src2[1] * float24::FromFloat32(-1);
|
|
|
|
src2[2] = src2[2] * float24::FromFloat32(-1);
|
|
|
|
src2[3] = src2[3] * float24::FromFloat32(-1);
|
|
|
|
}
|
|
|
|
|
2015-03-12 09:18:46 -04:00
|
|
|
float24* dest = (instr.common.dest.Value() < 0x10) ? &state.output_registers[instr.common.dest.Value().GetIndex()][0]
|
2015-03-08 16:52:38 -04:00
|
|
|
: (instr.common.dest.Value() < 0x20) ? &state.temporary_registers[instr.common.dest.Value().GetIndex()][0]
|
2014-12-19 13:58:21 -05:00
|
|
|
: dummy_vec4_float24;
|
2014-12-12 12:31:37 -05:00
|
|
|
|
|
|
|
state.debug.max_opdesc_id = std::max<u32>(state.debug.max_opdesc_id, 1+instr.common.operand_desc_id);
|
2014-07-26 13:17:09 -04:00
|
|
|
|
2015-03-08 16:52:38 -04:00
|
|
|
switch (instr.opcode.Value().EffectiveOpCode()) {
|
|
|
|
case OpCode::Id::ADD:
|
2014-07-26 13:17:09 -04:00
|
|
|
{
|
|
|
|
for (int i = 0; i < 4; ++i) {
|
|
|
|
if (!swizzle.DestComponentEnabled(i))
|
|
|
|
continue;
|
|
|
|
|
|
|
|
dest[i] = src1[i] + src2[i];
|
|
|
|
}
|
|
|
|
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
2015-03-08 16:52:38 -04:00
|
|
|
case OpCode::Id::MUL:
|
2014-07-26 13:17:09 -04:00
|
|
|
{
|
|
|
|
for (int i = 0; i < 4; ++i) {
|
|
|
|
if (!swizzle.DestComponentEnabled(i))
|
|
|
|
continue;
|
|
|
|
|
|
|
|
dest[i] = src1[i] * src2[i];
|
|
|
|
}
|
|
|
|
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
2015-05-06 18:37:12 -04:00
|
|
|
case OpCode::Id::FLR:
|
|
|
|
for (int i = 0; i < 4; ++i) {
|
|
|
|
if (!swizzle.DestComponentEnabled(i))
|
|
|
|
continue;
|
|
|
|
|
|
|
|
dest[i] = float24::FromFloat32(std::floor(src1[i].ToFloat32()));
|
|
|
|
}
|
|
|
|
break;
|
|
|
|
|
2015-03-08 16:52:38 -04:00
|
|
|
case OpCode::Id::MAX:
|
2014-12-13 15:22:55 -05:00
|
|
|
for (int i = 0; i < 4; ++i) {
|
|
|
|
if (!swizzle.DestComponentEnabled(i))
|
|
|
|
continue;
|
|
|
|
|
|
|
|
dest[i] = std::max(src1[i], src2[i]);
|
|
|
|
}
|
|
|
|
break;
|
|
|
|
|
2015-05-22 23:13:09 -04:00
|
|
|
case OpCode::Id::MIN:
|
|
|
|
for (int i = 0; i < 4; ++i) {
|
|
|
|
if (!swizzle.DestComponentEnabled(i))
|
|
|
|
continue;
|
|
|
|
|
|
|
|
dest[i] = std::min(src1[i], src2[i]);
|
|
|
|
}
|
|
|
|
break;
|
|
|
|
|
2015-03-08 16:52:38 -04:00
|
|
|
case OpCode::Id::DP3:
|
|
|
|
case OpCode::Id::DP4:
|
2014-07-26 13:17:09 -04:00
|
|
|
{
|
|
|
|
float24 dot = float24::FromFloat32(0.f);
|
2015-03-08 16:52:38 -04:00
|
|
|
int num_components = (instr.opcode.Value() == OpCode::Id::DP3) ? 3 : 4;
|
2014-07-26 13:17:09 -04:00
|
|
|
for (int i = 0; i < num_components; ++i)
|
|
|
|
dot = dot + src1[i] * src2[i];
|
|
|
|
|
2015-07-19 18:01:59 -04:00
|
|
|
for (int i = 0; i < 4; ++i) {
|
2014-07-26 13:17:09 -04:00
|
|
|
if (!swizzle.DestComponentEnabled(i))
|
|
|
|
continue;
|
|
|
|
|
|
|
|
dest[i] = dot;
|
|
|
|
}
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
|
|
|
// Reciprocal
|
2015-03-08 16:52:38 -04:00
|
|
|
case OpCode::Id::RCP:
|
2014-07-26 13:17:09 -04:00
|
|
|
{
|
|
|
|
for (int i = 0; i < 4; ++i) {
|
|
|
|
if (!swizzle.DestComponentEnabled(i))
|
|
|
|
continue;
|
|
|
|
|
|
|
|
// TODO: Be stable against division by zero!
|
|
|
|
// TODO: I think this might be wrong... we should only use one component here
|
2015-02-01 15:31:21 -05:00
|
|
|
dest[i] = float24::FromFloat32(1.0f / src1[i].ToFloat32());
|
2014-07-26 13:17:09 -04:00
|
|
|
}
|
|
|
|
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
|
|
|
// Reciprocal Square Root
|
2015-03-08 16:52:38 -04:00
|
|
|
case OpCode::Id::RSQ:
|
2014-07-26 13:17:09 -04:00
|
|
|
{
|
|
|
|
for (int i = 0; i < 4; ++i) {
|
|
|
|
if (!swizzle.DestComponentEnabled(i))
|
|
|
|
continue;
|
|
|
|
|
|
|
|
// TODO: Be stable against division by zero!
|
|
|
|
// TODO: I think this might be wrong... we should only use one component here
|
2015-02-01 15:31:21 -05:00
|
|
|
dest[i] = float24::FromFloat32(1.0f / sqrt(src1[i].ToFloat32()));
|
2014-07-26 13:17:09 -04:00
|
|
|
}
|
|
|
|
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
2015-03-08 16:52:38 -04:00
|
|
|
case OpCode::Id::MOVA:
|
2014-12-12 16:50:09 -05:00
|
|
|
{
|
|
|
|
for (int i = 0; i < 2; ++i) {
|
|
|
|
if (!swizzle.DestComponentEnabled(i))
|
|
|
|
continue;
|
|
|
|
|
|
|
|
// TODO: Figure out how the rounding is done on hardware
|
|
|
|
state.address_registers[i] = static_cast<s32>(src1[i].ToFloat32());
|
|
|
|
}
|
|
|
|
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
2015-03-08 16:52:38 -04:00
|
|
|
case OpCode::Id::MOV:
|
2014-07-26 13:17:09 -04:00
|
|
|
{
|
|
|
|
for (int i = 0; i < 4; ++i) {
|
|
|
|
if (!swizzle.DestComponentEnabled(i))
|
|
|
|
continue;
|
|
|
|
|
|
|
|
dest[i] = src1[i];
|
|
|
|
}
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
2015-05-22 23:40:43 -04:00
|
|
|
case OpCode::Id::SLT:
|
|
|
|
case OpCode::Id::SLTI:
|
|
|
|
for (int i = 0; i < 4; ++i) {
|
|
|
|
if (!swizzle.DestComponentEnabled(i))
|
|
|
|
continue;
|
|
|
|
|
|
|
|
dest[i] = (src1[i] < src2[i]) ? float24::FromFloat32(1.0f) : float24::FromFloat32(0.0f);
|
|
|
|
}
|
|
|
|
break;
|
|
|
|
|
2015-03-08 16:52:38 -04:00
|
|
|
case OpCode::Id::CMP:
|
2014-12-12 16:50:09 -05:00
|
|
|
for (int i = 0; i < 2; ++i) {
|
|
|
|
// TODO: Can you restrict to one compare via dest masking?
|
|
|
|
|
|
|
|
auto compare_op = instr.common.compare_op;
|
|
|
|
auto op = (i == 0) ? compare_op.x.Value() : compare_op.y.Value();
|
|
|
|
|
|
|
|
switch (op) {
|
|
|
|
case compare_op.Equal:
|
|
|
|
state.conditional_code[i] = (src1[i] == src2[i]);
|
|
|
|
break;
|
|
|
|
|
|
|
|
case compare_op.NotEqual:
|
|
|
|
state.conditional_code[i] = (src1[i] != src2[i]);
|
|
|
|
break;
|
|
|
|
|
|
|
|
case compare_op.LessThan:
|
|
|
|
state.conditional_code[i] = (src1[i] < src2[i]);
|
|
|
|
break;
|
|
|
|
|
|
|
|
case compare_op.LessEqual:
|
|
|
|
state.conditional_code[i] = (src1[i] <= src2[i]);
|
|
|
|
break;
|
|
|
|
|
|
|
|
case compare_op.GreaterThan:
|
|
|
|
state.conditional_code[i] = (src1[i] > src2[i]);
|
|
|
|
break;
|
|
|
|
|
|
|
|
case compare_op.GreaterEqual:
|
|
|
|
state.conditional_code[i] = (src1[i] >= src2[i]);
|
|
|
|
break;
|
|
|
|
|
|
|
|
default:
|
|
|
|
LOG_ERROR(HW_GPU, "Unknown compare mode %x", static_cast<int>(op));
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
break;
|
|
|
|
|
2014-12-12 12:31:37 -05:00
|
|
|
default:
|
|
|
|
LOG_ERROR(HW_GPU, "Unhandled arithmetic instruction: 0x%02x (%s): 0x%08x",
|
2015-03-08 16:52:38 -04:00
|
|
|
(int)instr.opcode.Value().EffectiveOpCode(), instr.opcode.Value().GetInfo().name, instr.hex);
|
2015-01-20 20:16:47 -05:00
|
|
|
DEBUG_ASSERT(false);
|
2014-12-12 12:31:37 -05:00
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
|
|
|
break;
|
|
|
|
}
|
2015-01-03 07:29:44 -05:00
|
|
|
|
2015-03-08 16:52:38 -04:00
|
|
|
case OpCode::Type::MultiplyAdd:
|
2015-01-03 07:29:44 -05:00
|
|
|
{
|
2015-05-25 14:34:09 -04:00
|
|
|
if ((instr.opcode.Value().EffectiveOpCode() == OpCode::Id::MAD) ||
|
2015-05-05 22:06:46 -04:00
|
|
|
(instr.opcode.Value().EffectiveOpCode() == OpCode::Id::MADI)) {
|
2015-01-03 07:29:44 -05:00
|
|
|
const SwizzlePattern& swizzle = *(SwizzlePattern*)&swizzle_data[instr.mad.operand_desc_id];
|
|
|
|
|
2015-05-05 22:06:46 -04:00
|
|
|
bool is_inverted = (instr.opcode.Value().EffectiveOpCode() == OpCode::Id::MADI);
|
|
|
|
|
|
|
|
const float24* src1_ = LookupSourceRegister(instr.mad.GetSrc1(is_inverted));
|
|
|
|
const float24* src2_ = LookupSourceRegister(instr.mad.GetSrc2(is_inverted));
|
|
|
|
const float24* src3_ = LookupSourceRegister(instr.mad.GetSrc3(is_inverted));
|
2015-01-03 07:29:44 -05:00
|
|
|
|
|
|
|
const bool negate_src1 = ((bool)swizzle.negate_src1 != false);
|
|
|
|
const bool negate_src2 = ((bool)swizzle.negate_src2 != false);
|
|
|
|
const bool negate_src3 = ((bool)swizzle.negate_src3 != false);
|
|
|
|
|
|
|
|
float24 src1[4] = {
|
|
|
|
src1_[(int)swizzle.GetSelectorSrc1(0)],
|
|
|
|
src1_[(int)swizzle.GetSelectorSrc1(1)],
|
|
|
|
src1_[(int)swizzle.GetSelectorSrc1(2)],
|
|
|
|
src1_[(int)swizzle.GetSelectorSrc1(3)],
|
|
|
|
};
|
|
|
|
if (negate_src1) {
|
|
|
|
src1[0] = src1[0] * float24::FromFloat32(-1);
|
|
|
|
src1[1] = src1[1] * float24::FromFloat32(-1);
|
|
|
|
src1[2] = src1[2] * float24::FromFloat32(-1);
|
|
|
|
src1[3] = src1[3] * float24::FromFloat32(-1);
|
|
|
|
}
|
|
|
|
float24 src2[4] = {
|
|
|
|
src2_[(int)swizzle.GetSelectorSrc2(0)],
|
|
|
|
src2_[(int)swizzle.GetSelectorSrc2(1)],
|
|
|
|
src2_[(int)swizzle.GetSelectorSrc2(2)],
|
|
|
|
src2_[(int)swizzle.GetSelectorSrc2(3)],
|
|
|
|
};
|
|
|
|
if (negate_src2) {
|
|
|
|
src2[0] = src2[0] * float24::FromFloat32(-1);
|
|
|
|
src2[1] = src2[1] * float24::FromFloat32(-1);
|
|
|
|
src2[2] = src2[2] * float24::FromFloat32(-1);
|
|
|
|
src2[3] = src2[3] * float24::FromFloat32(-1);
|
|
|
|
}
|
|
|
|
float24 src3[4] = {
|
|
|
|
src3_[(int)swizzle.GetSelectorSrc3(0)],
|
|
|
|
src3_[(int)swizzle.GetSelectorSrc3(1)],
|
|
|
|
src3_[(int)swizzle.GetSelectorSrc3(2)],
|
|
|
|
src3_[(int)swizzle.GetSelectorSrc3(3)],
|
|
|
|
};
|
|
|
|
if (negate_src3) {
|
|
|
|
src3[0] = src3[0] * float24::FromFloat32(-1);
|
|
|
|
src3[1] = src3[1] * float24::FromFloat32(-1);
|
|
|
|
src3[2] = src3[2] * float24::FromFloat32(-1);
|
|
|
|
src3[3] = src3[3] * float24::FromFloat32(-1);
|
|
|
|
}
|
|
|
|
|
2015-03-12 09:18:46 -04:00
|
|
|
float24* dest = (instr.mad.dest.Value() < 0x10) ? &state.output_registers[instr.mad.dest.Value().GetIndex()][0]
|
2015-03-08 16:52:38 -04:00
|
|
|
: (instr.mad.dest.Value() < 0x20) ? &state.temporary_registers[instr.mad.dest.Value().GetIndex()][0]
|
2015-01-03 07:29:44 -05:00
|
|
|
: dummy_vec4_float24;
|
|
|
|
|
|
|
|
for (int i = 0; i < 4; ++i) {
|
|
|
|
if (!swizzle.DestComponentEnabled(i))
|
|
|
|
continue;
|
|
|
|
|
|
|
|
dest[i] = src1[i] * src2[i] + src3[i];
|
|
|
|
}
|
|
|
|
} else {
|
|
|
|
LOG_ERROR(HW_GPU, "Unhandled multiply-add instruction: 0x%02x (%s): 0x%08x",
|
2015-03-08 16:52:38 -04:00
|
|
|
(int)instr.opcode.Value().EffectiveOpCode(), instr.opcode.Value().GetInfo().name, instr.hex);
|
2015-01-03 07:29:44 -05:00
|
|
|
}
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
2014-12-12 12:31:37 -05:00
|
|
|
default:
|
2015-01-02 15:40:09 -05:00
|
|
|
{
|
2015-07-21 19:38:59 -04:00
|
|
|
static auto evaluate_condition = [](const UnitState& state, bool refx, bool refy, Instruction::FlowControlType flow_control) {
|
2015-01-02 15:40:09 -05:00
|
|
|
bool results[2] = { refx == state.conditional_code[0],
|
|
|
|
refy == state.conditional_code[1] };
|
|
|
|
|
|
|
|
switch (flow_control.op) {
|
|
|
|
case flow_control.Or:
|
|
|
|
return results[0] || results[1];
|
|
|
|
|
|
|
|
case flow_control.And:
|
|
|
|
return results[0] && results[1];
|
|
|
|
|
|
|
|
case flow_control.JustX:
|
|
|
|
return results[0];
|
|
|
|
|
|
|
|
case flow_control.JustY:
|
|
|
|
return results[1];
|
|
|
|
}
|
|
|
|
};
|
|
|
|
|
2014-12-12 16:50:09 -05:00
|
|
|
// Handle each instruction on its own
|
2015-03-08 16:52:38 -04:00
|
|
|
switch (instr.opcode.Value()) {
|
|
|
|
case OpCode::Id::END:
|
2014-12-13 15:30:13 -05:00
|
|
|
exit_loop = true;
|
2014-07-26 13:17:09 -04:00
|
|
|
break;
|
|
|
|
|
2015-03-08 16:52:38 -04:00
|
|
|
case OpCode::Id::JMPC:
|
2015-01-02 15:40:09 -05:00
|
|
|
if (evaluate_condition(state, instr.flow_control.refx, instr.flow_control.refy, instr.flow_control)) {
|
2015-07-26 06:40:34 -04:00
|
|
|
state.program_counter = instr.flow_control.dest_offset - 1;
|
2015-01-02 15:40:09 -05:00
|
|
|
}
|
|
|
|
break;
|
|
|
|
|
2015-03-08 16:52:38 -04:00
|
|
|
case OpCode::Id::JMPU:
|
2015-05-13 23:29:27 -04:00
|
|
|
if (uniforms.b[instr.flow_control.bool_uniform_id]) {
|
2015-07-26 06:40:34 -04:00
|
|
|
state.program_counter = instr.flow_control.dest_offset - 1;
|
2015-01-02 15:40:09 -05:00
|
|
|
}
|
|
|
|
break;
|
|
|
|
|
2015-03-08 16:52:38 -04:00
|
|
|
case OpCode::Id::CALL:
|
2014-12-20 09:19:36 -05:00
|
|
|
call(state,
|
2014-12-13 15:30:13 -05:00
|
|
|
instr.flow_control.dest_offset,
|
|
|
|
instr.flow_control.num_instructions,
|
2015-07-26 06:40:34 -04:00
|
|
|
state.program_counter + 1, 0, 0);
|
2014-12-13 15:30:13 -05:00
|
|
|
break;
|
2014-07-26 13:17:09 -04:00
|
|
|
|
2015-03-08 16:52:38 -04:00
|
|
|
case OpCode::Id::CALLU:
|
2015-05-13 23:29:27 -04:00
|
|
|
if (uniforms.b[instr.flow_control.bool_uniform_id]) {
|
2015-01-02 15:40:09 -05:00
|
|
|
call(state,
|
|
|
|
instr.flow_control.dest_offset,
|
|
|
|
instr.flow_control.num_instructions,
|
2015-07-26 06:40:34 -04:00
|
|
|
state.program_counter + 1, 0, 0);
|
2015-01-02 15:40:09 -05:00
|
|
|
}
|
|
|
|
break;
|
|
|
|
|
2015-03-08 16:52:38 -04:00
|
|
|
case OpCode::Id::CALLC:
|
2015-01-02 15:40:09 -05:00
|
|
|
if (evaluate_condition(state, instr.flow_control.refx, instr.flow_control.refy, instr.flow_control)) {
|
|
|
|
call(state,
|
|
|
|
instr.flow_control.dest_offset,
|
|
|
|
instr.flow_control.num_instructions,
|
2015-07-26 06:40:34 -04:00
|
|
|
state.program_counter + 1, 0, 0);
|
2015-01-02 15:40:09 -05:00
|
|
|
}
|
|
|
|
break;
|
|
|
|
|
2015-03-08 16:52:38 -04:00
|
|
|
case OpCode::Id::NOP:
|
2014-07-26 13:17:09 -04:00
|
|
|
break;
|
|
|
|
|
2015-03-08 16:52:38 -04:00
|
|
|
case OpCode::Id::IFU:
|
2015-05-13 23:29:27 -04:00
|
|
|
if (uniforms.b[instr.flow_control.bool_uniform_id]) {
|
2014-12-20 09:19:36 -05:00
|
|
|
call(state,
|
2015-07-26 06:40:34 -04:00
|
|
|
state.program_counter + 1,
|
|
|
|
instr.flow_control.dest_offset - state.program_counter - 1,
|
2014-12-20 21:01:35 -05:00
|
|
|
instr.flow_control.dest_offset + instr.flow_control.num_instructions, 0, 0);
|
2014-12-13 15:30:13 -05:00
|
|
|
} else {
|
2014-12-20 09:19:36 -05:00
|
|
|
call(state,
|
2014-12-13 15:30:13 -05:00
|
|
|
instr.flow_control.dest_offset,
|
|
|
|
instr.flow_control.num_instructions,
|
2014-12-20 21:01:35 -05:00
|
|
|
instr.flow_control.dest_offset + instr.flow_control.num_instructions, 0, 0);
|
2014-12-13 15:30:13 -05:00
|
|
|
}
|
|
|
|
|
2014-07-26 13:17:09 -04:00
|
|
|
break;
|
|
|
|
|
2015-03-08 16:52:38 -04:00
|
|
|
case OpCode::Id::IFC:
|
2014-12-12 16:50:09 -05:00
|
|
|
{
|
|
|
|
// TODO: Do we need to consider swizzlers here?
|
|
|
|
|
2015-01-02 15:40:09 -05:00
|
|
|
if (evaluate_condition(state, instr.flow_control.refx, instr.flow_control.refy, instr.flow_control)) {
|
2014-12-20 09:19:36 -05:00
|
|
|
call(state,
|
2015-07-26 06:40:34 -04:00
|
|
|
state.program_counter + 1,
|
|
|
|
instr.flow_control.dest_offset - state.program_counter - 1,
|
2014-12-20 21:01:35 -05:00
|
|
|
instr.flow_control.dest_offset + instr.flow_control.num_instructions, 0, 0);
|
2014-12-12 16:50:09 -05:00
|
|
|
} else {
|
2014-12-20 09:19:36 -05:00
|
|
|
call(state,
|
2014-12-13 15:30:13 -05:00
|
|
|
instr.flow_control.dest_offset,
|
|
|
|
instr.flow_control.num_instructions,
|
2014-12-20 21:01:35 -05:00
|
|
|
instr.flow_control.dest_offset + instr.flow_control.num_instructions, 0, 0);
|
2014-12-12 16:50:09 -05:00
|
|
|
}
|
|
|
|
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
2015-03-08 16:52:38 -04:00
|
|
|
case OpCode::Id::LOOP:
|
2014-12-20 21:01:35 -05:00
|
|
|
{
|
2015-05-13 23:29:27 -04:00
|
|
|
state.address_registers[2] = uniforms.i[instr.flow_control.int_uniform_id].y;
|
2014-12-20 21:01:35 -05:00
|
|
|
|
|
|
|
call(state,
|
2015-07-26 06:40:34 -04:00
|
|
|
state.program_counter + 1,
|
|
|
|
instr.flow_control.dest_offset - state.program_counter + 1,
|
2014-12-20 21:01:35 -05:00
|
|
|
instr.flow_control.dest_offset + 1,
|
2015-05-13 23:29:27 -04:00
|
|
|
uniforms.i[instr.flow_control.int_uniform_id].x,
|
|
|
|
uniforms.i[instr.flow_control.int_uniform_id].z);
|
2014-12-20 21:01:35 -05:00
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
2014-07-26 13:17:09 -04:00
|
|
|
default:
|
2014-12-05 20:53:49 -05:00
|
|
|
LOG_ERROR(HW_GPU, "Unhandled instruction: 0x%02x (%s): 0x%08x",
|
2015-03-08 16:52:38 -04:00
|
|
|
(int)instr.opcode.Value().EffectiveOpCode(), instr.opcode.Value().GetInfo().name, instr.hex);
|
2014-07-26 13:17:09 -04:00
|
|
|
break;
|
2014-12-12 12:31:37 -05:00
|
|
|
}
|
|
|
|
|
|
|
|
break;
|
2014-07-26 13:17:09 -04:00
|
|
|
}
|
2015-01-02 15:40:09 -05:00
|
|
|
}
|
2014-07-26 13:17:09 -04:00
|
|
|
|
2014-12-13 15:30:13 -05:00
|
|
|
++state.program_counter;
|
2014-12-12 16:50:09 -05:00
|
|
|
|
2014-07-26 13:17:09 -04:00
|
|
|
if (exit_loop)
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
} // namespace
|
|
|
|
|
|
|
|
} // namespace
|