2018-12-20 17:09:21 -05:00
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// Copyright 2018 yuzu Emulator Project
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// Licensed under GPLv2 or any later version
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// Refer to the license.txt file included.
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#include "common/assert.h"
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#include "common/common_types.h"
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#include "video_core/engines/shader_bytecode.h"
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2019-06-04 21:44:06 -04:00
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#include "video_core/shader/node_helper.h"
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2018-12-20 17:09:21 -05:00
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#include "video_core/shader/shader_ir.h"
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namespace VideoCommon::Shader {
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using Tegra::Shader::Instruction;
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using Tegra::Shader::OpCode;
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using Tegra::Shader::PredCondition;
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u32 ShaderIR::DecodeXmad(NodeBlock& bb, u32 pc) {
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const Instruction instr = {program_code[pc]};
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const auto opcode = OpCode::Decode(instr);
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2018-12-17 16:09:40 -05:00
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UNIMPLEMENTED_IF(instr.xmad.sign_a);
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UNIMPLEMENTED_IF(instr.xmad.sign_b);
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UNIMPLEMENTED_IF_MSG(instr.generates_cc,
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"Condition codes generation in XMAD is not implemented");
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2018-12-21 01:12:16 -05:00
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Node op_a = GetRegister(instr.gpr8);
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// TODO(bunnei): Needs to be fixed once op_a or op_b is signed
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UNIMPLEMENTED_IF(instr.xmad.sign_a != instr.xmad.sign_b);
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const bool is_signed_a = instr.xmad.sign_a == 1;
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const bool is_signed_b = instr.xmad.sign_b == 1;
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const bool is_signed_c = is_signed_a;
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auto [is_merge, is_psl, is_high_b, mode, op_b_binding,
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op_c] = [&]() -> std::tuple<bool, bool, bool, Tegra::Shader::XmadMode, Node, Node> {
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switch (opcode->get().GetId()) {
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case OpCode::Id::XMAD_CR:
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return {instr.xmad.merge_56,
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instr.xmad.product_shift_left_second,
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instr.xmad.high_b,
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instr.xmad.mode_cbf,
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GetConstBuffer(instr.cbuf34.index, instr.cbuf34.GetOffset()),
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GetRegister(instr.gpr39)};
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case OpCode::Id::XMAD_RR:
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return {instr.xmad.merge_37, instr.xmad.product_shift_left, instr.xmad.high_b_rr,
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instr.xmad.mode, GetRegister(instr.gpr20), GetRegister(instr.gpr39)};
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case OpCode::Id::XMAD_RC:
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return {false,
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false,
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instr.xmad.high_b,
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instr.xmad.mode_cbf,
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GetRegister(instr.gpr39),
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GetConstBuffer(instr.cbuf34.index, instr.cbuf34.GetOffset())};
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case OpCode::Id::XMAD_IMM:
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return {instr.xmad.merge_37,
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instr.xmad.product_shift_left,
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false,
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instr.xmad.mode,
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Immediate(static_cast<u32>(instr.xmad.imm20_16)),
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GetRegister(instr.gpr39)};
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default:
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UNIMPLEMENTED_MSG("Unhandled XMAD instruction: {}", opcode->get().GetName());
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return {false, false, false, Tegra::Shader::XmadMode::None, Immediate(0), Immediate(0)};
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}
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}();
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op_a = SignedOperation(OperationCode::IBitfieldExtract, is_signed_a, std::move(op_a),
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instr.xmad.high_a ? Immediate(16) : Immediate(0), Immediate(16));
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const Node original_b = op_b_binding;
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const Node op_b =
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SignedOperation(OperationCode::IBitfieldExtract, is_signed_b, std::move(op_b_binding),
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is_high_b ? Immediate(16) : Immediate(0), Immediate(16));
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// we already check sign_a and sign_b is difference or not before so just use one in here.
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Node product = SignedOperation(OperationCode::IMul, is_signed_a, op_a, op_b);
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if (is_psl) {
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product =
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SignedOperation(OperationCode::ILogicalShiftLeft, is_signed_a, product, Immediate(16));
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}
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SetTemporary(bb, 0, product);
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product = GetTemporary(0);
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const Node original_c = op_c;
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const Tegra::Shader::XmadMode set_mode = mode; // Workaround to clang compile error
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op_c = [&]() {
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switch (set_mode) {
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case Tegra::Shader::XmadMode::None:
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return original_c;
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case Tegra::Shader::XmadMode::CLo:
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return BitfieldExtract(original_c, 0, 16);
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case Tegra::Shader::XmadMode::CHi:
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return BitfieldExtract(original_c, 16, 16);
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case Tegra::Shader::XmadMode::CBcc: {
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const Node shifted_b = SignedOperation(OperationCode::ILogicalShiftLeft, is_signed_b,
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original_b, Immediate(16));
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return SignedOperation(OperationCode::IAdd, is_signed_c, original_c, shifted_b);
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}
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case Tegra::Shader::XmadMode::CSfu: {
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const Node comp_a = GetPredicateComparisonInteger(PredCondition::Equal, is_signed_a,
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op_a, Immediate(0));
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const Node comp_b = GetPredicateComparisonInteger(PredCondition::Equal, is_signed_b,
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op_b, Immediate(0));
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const Node comp = Operation(OperationCode::LogicalOr, comp_a, comp_b);
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const Node comp_minus_a = GetPredicateComparisonInteger(
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PredCondition::NotEqual, is_signed_a,
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SignedOperation(OperationCode::IBitwiseAnd, is_signed_a, op_a,
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Immediate(0x80000000)),
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Immediate(0));
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const Node comp_minus_b = GetPredicateComparisonInteger(
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PredCondition::NotEqual, is_signed_b,
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SignedOperation(OperationCode::IBitwiseAnd, is_signed_b, op_b,
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Immediate(0x80000000)),
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Immediate(0));
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Node new_c = Operation(
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OperationCode::Select, comp_minus_a,
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SignedOperation(OperationCode::IAdd, is_signed_c, original_c, Immediate(-65536)),
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original_c);
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new_c = Operation(
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OperationCode::Select, comp_minus_b,
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SignedOperation(OperationCode::IAdd, is_signed_c, new_c, Immediate(-65536)),
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std::move(new_c));
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return Operation(OperationCode::Select, comp, original_c, std::move(new_c));
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}
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default:
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UNREACHABLE();
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return Immediate(0);
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}
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}();
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2019-07-16 10:31:17 -04:00
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SetTemporary(bb, 1, op_c);
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op_c = GetTemporary(1);
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2018-12-17 16:09:40 -05:00
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// TODO(Rodrigo): Use an appropiate sign for this operation
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Node sum = SignedOperation(OperationCode::IAdd, is_signed_a, product, std::move(op_c));
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SetTemporary(bb, 2, sum);
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sum = GetTemporary(2);
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if (is_merge) {
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const Node a = SignedOperation(OperationCode::IBitfieldExtract, is_signed_a, std::move(sum),
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Immediate(0), Immediate(16));
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const Node b = SignedOperation(OperationCode::ILogicalShiftLeft, is_signed_b, original_b,
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Immediate(16));
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sum = SignedOperation(OperationCode::IBitwiseOr, is_signed_a, a, b);
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}
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2018-12-27 14:50:36 -05:00
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SetInternalFlagsFromInteger(bb, sum, instr.generates_cc);
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SetRegister(bb, instr.gpr0, std::move(sum));
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return pc;
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}
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2019-04-08 09:49:11 -04:00
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} // namespace VideoCommon::Shader
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