suyu/src/video_core/shader/decode/xmad.cpp

120 lines
4.7 KiB
C++
Raw Normal View History

2018-12-20 17:09:21 -05:00
// Copyright 2018 yuzu Emulator Project
// Licensed under GPLv2 or any later version
// Refer to the license.txt file included.
#include "common/assert.h"
#include "common/common_types.h"
#include "video_core/engines/shader_bytecode.h"
#include "video_core/shader/shader_ir.h"
namespace VideoCommon::Shader {
using Tegra::Shader::Instruction;
using Tegra::Shader::OpCode;
u32 ShaderIR::DecodeXmad(NodeBlock& bb, u32 pc) {
2018-12-20 17:09:21 -05:00
const Instruction instr = {program_code[pc]};
const auto opcode = OpCode::Decode(instr);
2018-12-17 16:09:40 -05:00
UNIMPLEMENTED_IF(instr.xmad.sign_a);
UNIMPLEMENTED_IF(instr.xmad.sign_b);
UNIMPLEMENTED_IF_MSG(instr.generates_cc,
"Condition codes generation in XMAD is not implemented");
2018-12-21 01:12:16 -05:00
Node op_a = GetRegister(instr.gpr8);
2018-12-17 16:09:40 -05:00
// TODO(bunnei): Needs to be fixed once op_a or op_b is signed
UNIMPLEMENTED_IF(instr.xmad.sign_a != instr.xmad.sign_b);
const bool is_signed_a = instr.xmad.sign_a == 1;
const bool is_signed_b = instr.xmad.sign_b == 1;
const bool is_signed_c = is_signed_a;
auto [is_merge, is_psl, is_high_b, mode, op_b,
op_c] = [&]() -> std::tuple<bool, bool, bool, Tegra::Shader::XmadMode, Node, Node> {
2018-12-17 16:09:40 -05:00
switch (opcode->get().GetId()) {
case OpCode::Id::XMAD_CR:
return {instr.xmad.merge_56,
instr.xmad.product_shift_left_second,
instr.xmad.high_b,
instr.xmad.mode_cbf,
GetConstBuffer(instr.cbuf34.index, instr.cbuf34.GetOffset()),
2018-12-17 16:09:40 -05:00
GetRegister(instr.gpr39)};
case OpCode::Id::XMAD_RR:
return {instr.xmad.merge_37, instr.xmad.product_shift_left, instr.xmad.high_b_rr,
instr.xmad.mode, GetRegister(instr.gpr20), GetRegister(instr.gpr39)};
2018-12-17 16:09:40 -05:00
case OpCode::Id::XMAD_RC:
return {false,
false,
instr.xmad.high_b,
instr.xmad.mode_cbf,
GetRegister(instr.gpr39),
GetConstBuffer(instr.cbuf34.index, instr.cbuf34.GetOffset())};
2018-12-17 16:09:40 -05:00
case OpCode::Id::XMAD_IMM:
return {instr.xmad.merge_37,
instr.xmad.product_shift_left,
false,
instr.xmad.mode,
Immediate(static_cast<u32>(instr.xmad.imm20_16)),
2018-12-17 16:09:40 -05:00
GetRegister(instr.gpr39)};
}
UNIMPLEMENTED_MSG("Unhandled XMAD instruction: {}", opcode->get().GetName());
return {false, false, false, Tegra::Shader::XmadMode::None, Immediate(0), Immediate(0)};
2018-12-17 16:09:40 -05:00
}();
op_a = BitfieldExtract(op_a, instr.xmad.high_a ? 16 : 0, 16);
2018-12-17 16:09:40 -05:00
const Node original_b = op_b;
op_b = BitfieldExtract(op_b, is_high_b ? 16 : 0, 16);
2018-12-17 16:09:40 -05:00
// TODO(Rodrigo): Use an appropiate sign for this operation
Node product = Operation(OperationCode::IMul, NO_PRECISE, op_a, op_b);
if (is_psl) {
2018-12-29 23:05:14 -05:00
product = Operation(OperationCode::ILogicalShiftLeft, NO_PRECISE, product, Immediate(16));
2018-12-17 16:09:40 -05:00
}
SetTemporal(bb, 0, product);
product = GetTemporal(0);
2018-12-17 16:09:40 -05:00
2019-01-15 19:06:05 -05:00
const Node original_c = op_c;
const Tegra::Shader::XmadMode set_mode = mode; // Workaround to clang compile error
2018-12-17 16:09:40 -05:00
op_c = [&]() {
switch (set_mode) {
2018-12-17 16:09:40 -05:00
case Tegra::Shader::XmadMode::None:
2019-01-15 19:06:05 -05:00
return original_c;
2018-12-17 16:09:40 -05:00
case Tegra::Shader::XmadMode::CLo:
2019-01-15 19:06:05 -05:00
return BitfieldExtract(original_c, 0, 16);
2018-12-17 16:09:40 -05:00
case Tegra::Shader::XmadMode::CHi:
2019-01-15 19:06:05 -05:00
return BitfieldExtract(original_c, 16, 16);
2018-12-17 16:09:40 -05:00
case Tegra::Shader::XmadMode::CBcc: {
const Node shifted_b = SignedOperation(OperationCode::ILogicalShiftLeft, is_signed_b,
NO_PRECISE, original_b, Immediate(16));
2019-01-15 19:06:05 -05:00
return SignedOperation(OperationCode::IAdd, is_signed_c, NO_PRECISE, original_c,
shifted_b);
2018-12-17 16:09:40 -05:00
}
default:
2018-12-17 16:09:40 -05:00
UNIMPLEMENTED_MSG("Unhandled XMAD mode: {}", static_cast<u32>(instr.xmad.mode.Value()));
return Immediate(0);
2018-12-17 16:09:40 -05:00
}
}();
SetTemporal(bb, 1, op_c);
op_c = GetTemporal(1);
2018-12-17 16:09:40 -05:00
// TODO(Rodrigo): Use an appropiate sign for this operation
Node sum = Operation(OperationCode::IAdd, product, op_c);
SetTemporal(bb, 2, sum);
sum = GetTemporal(2);
2018-12-17 16:09:40 -05:00
if (is_merge) {
const Node a = BitfieldExtract(sum, 0, 16);
2018-12-17 16:09:40 -05:00
const Node b =
Operation(OperationCode::ILogicalShiftLeft, NO_PRECISE, original_b, Immediate(16));
2018-12-17 16:09:40 -05:00
sum = Operation(OperationCode::IBitwiseOr, NO_PRECISE, a, b);
}
SetInternalFlagsFromInteger(bb, sum, instr.generates_cc);
2018-12-17 16:09:40 -05:00
SetRegister(bb, instr.gpr0, sum);
2018-12-20 17:09:21 -05:00
return pc;
}
} // namespace VideoCommon::Shader