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https://git.suyu.dev/suyu/suyu.git
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11f4e739bd
This commit takes care of implementing the F16 Variants of the conversion instructions and makes sure conversions are done.
208 lines
8.3 KiB
C++
208 lines
8.3 KiB
C++
// Copyright 2018 yuzu Emulator Project
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// Licensed under GPLv2 or any later version
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// Refer to the license.txt file included.
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#include "common/assert.h"
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#include "common/common_types.h"
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#include "video_core/engines/shader_bytecode.h"
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#include "video_core/shader/node_helper.h"
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#include "video_core/shader/shader_ir.h"
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namespace VideoCommon::Shader {
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using Tegra::Shader::Instruction;
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using Tegra::Shader::OpCode;
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using Tegra::Shader::Register;
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u32 ShaderIR::DecodeConversion(NodeBlock& bb, u32 pc) {
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const Instruction instr = {program_code[pc]};
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const auto opcode = OpCode::Decode(instr);
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switch (opcode->get().GetId()) {
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case OpCode::Id::I2I_R:
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case OpCode::Id::I2I_C:
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case OpCode::Id::I2I_IMM: {
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UNIMPLEMENTED_IF(instr.conversion.selector);
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UNIMPLEMENTED_IF(instr.conversion.dst_size != Register::Size::Word);
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UNIMPLEMENTED_IF(instr.alu.saturate_d);
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const bool input_signed = instr.conversion.is_input_signed;
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const bool output_signed = instr.conversion.is_output_signed;
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Node value = [&]() {
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switch (opcode->get().GetId()) {
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case OpCode::Id::I2I_R:
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return GetRegister(instr.gpr20);
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case OpCode::Id::I2I_C:
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return GetConstBuffer(instr.cbuf34.index, instr.cbuf34.GetOffset());
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case OpCode::Id::I2I_IMM:
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return Immediate(instr.alu.GetSignedImm20_20());
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default:
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UNREACHABLE();
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return Immediate(0);
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}
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}();
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value = ConvertIntegerSize(value, instr.conversion.src_size, input_signed);
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value = GetOperandAbsNegInteger(value, instr.conversion.abs_a, instr.conversion.negate_a,
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input_signed);
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if (input_signed != output_signed) {
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value = SignedOperation(OperationCode::ICastUnsigned, output_signed, NO_PRECISE, value);
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}
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SetInternalFlagsFromInteger(bb, value, instr.generates_cc);
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SetRegister(bb, instr.gpr0, value);
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break;
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}
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case OpCode::Id::I2F_R:
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case OpCode::Id::I2F_C:
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case OpCode::Id::I2F_IMM: {
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UNIMPLEMENTED_IF(instr.conversion.dst_size == Register::Size::Long);
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UNIMPLEMENTED_IF(instr.conversion.selector);
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UNIMPLEMENTED_IF_MSG(instr.generates_cc,
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"Condition codes generation in I2F is not implemented");
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Node value = [&]() {
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switch (opcode->get().GetId()) {
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case OpCode::Id::I2F_R:
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return GetRegister(instr.gpr20);
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case OpCode::Id::I2F_C:
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return GetConstBuffer(instr.cbuf34.index, instr.cbuf34.GetOffset());
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case OpCode::Id::I2F_IMM:
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return Immediate(instr.alu.GetSignedImm20_20());
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default:
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UNREACHABLE();
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return Immediate(0);
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}
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}();
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const bool input_signed = instr.conversion.is_input_signed;
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value = ConvertIntegerSize(value, instr.conversion.src_size, input_signed);
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value = GetOperandAbsNegInteger(value, instr.conversion.abs_a, false, input_signed);
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value = SignedOperation(OperationCode::FCastInteger, input_signed, PRECISE, value);
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value = GetOperandAbsNegFloat(value, false, instr.conversion.negate_a);
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SetInternalFlagsFromFloat(bb, value, instr.generates_cc);
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if (instr.conversion.dst_size == Register::Size::Short) {
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value = Operation(OperationCode::HCastFloat, PRECISE, value);
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}
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SetRegister(bb, instr.gpr0, value);
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break;
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}
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case OpCode::Id::F2F_R:
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case OpCode::Id::F2F_C:
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case OpCode::Id::F2F_IMM: {
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UNIMPLEMENTED_IF(instr.conversion.dst_size == Register::Size::Long);
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UNIMPLEMENTED_IF(instr.conversion.src_size == Register::Size::Long);
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UNIMPLEMENTED_IF_MSG(instr.generates_cc,
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"Condition codes generation in F2F is not implemented");
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Node value = [&]() {
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switch (opcode->get().GetId()) {
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case OpCode::Id::F2F_R:
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return GetRegister(instr.gpr20);
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case OpCode::Id::F2F_C:
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return GetConstBuffer(instr.cbuf34.index, instr.cbuf34.GetOffset());
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case OpCode::Id::F2F_IMM:
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return GetImmediate19(instr);
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default:
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UNREACHABLE();
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return Immediate(0);
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}
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}();
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if (instr.conversion.src_size == Register::Size::Short) {
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// TODO: figure where extract is sey in the encoding
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value = Operation(OperationCode::FCastHalf0, PRECISE, value);
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}
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value = GetOperandAbsNegFloat(value, instr.conversion.abs_a, instr.conversion.negate_a);
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value = [&]() {
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switch (instr.conversion.f2f.GetRoundingMode()) {
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case Tegra::Shader::F2fRoundingOp::None:
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return value;
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case Tegra::Shader::F2fRoundingOp::Round:
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return Operation(OperationCode::FRoundEven, PRECISE, value);
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case Tegra::Shader::F2fRoundingOp::Floor:
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return Operation(OperationCode::FFloor, PRECISE, value);
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case Tegra::Shader::F2fRoundingOp::Ceil:
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return Operation(OperationCode::FCeil, PRECISE, value);
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case Tegra::Shader::F2fRoundingOp::Trunc:
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return Operation(OperationCode::FTrunc, PRECISE, value);
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default:
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UNIMPLEMENTED_MSG("Unimplemented F2F rounding mode {}",
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static_cast<u32>(instr.conversion.f2f.rounding.Value()));
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return value;
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}
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}();
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value = GetSaturatedFloat(value, instr.alu.saturate_d);
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SetInternalFlagsFromFloat(bb, value, instr.generates_cc);
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if (instr.conversion.dst_size == Register::Size::Short) {
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value = Operation(OperationCode::HCastFloat, PRECISE, value);
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}
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SetRegister(bb, instr.gpr0, value);
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break;
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}
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case OpCode::Id::F2I_R:
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case OpCode::Id::F2I_C:
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case OpCode::Id::F2I_IMM: {
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UNIMPLEMENTED_IF(instr.conversion.src_size == Register::Size::Long);
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UNIMPLEMENTED_IF_MSG(instr.generates_cc,
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"Condition codes generation in F2I is not implemented");
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Node value = [&]() {
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switch (opcode->get().GetId()) {
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case OpCode::Id::F2I_R:
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return GetRegister(instr.gpr20);
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case OpCode::Id::F2I_C:
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return GetConstBuffer(instr.cbuf34.index, instr.cbuf34.GetOffset());
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case OpCode::Id::F2I_IMM:
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return GetImmediate19(instr);
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default:
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UNREACHABLE();
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return Immediate(0);
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}
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}();
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if (instr.conversion.src_size == Register::Size::Short) {
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// TODO: figure where extract is sey in the encoding
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value = Operation(OperationCode::FCastHalf0, PRECISE, value);
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}
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value = GetOperandAbsNegFloat(value, instr.conversion.abs_a, instr.conversion.negate_a);
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value = [&]() {
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switch (instr.conversion.f2i.rounding) {
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case Tegra::Shader::F2iRoundingOp::RoundEven:
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return Operation(OperationCode::FRoundEven, PRECISE, value);
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case Tegra::Shader::F2iRoundingOp::Floor:
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return Operation(OperationCode::FFloor, PRECISE, value);
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case Tegra::Shader::F2iRoundingOp::Ceil:
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return Operation(OperationCode::FCeil, PRECISE, value);
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case Tegra::Shader::F2iRoundingOp::Trunc:
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return Operation(OperationCode::FTrunc, PRECISE, value);
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default:
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UNIMPLEMENTED_MSG("Unimplemented F2I rounding mode {}",
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static_cast<u32>(instr.conversion.f2i.rounding.Value()));
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return Immediate(0);
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}
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}();
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const bool is_signed = instr.conversion.is_output_signed;
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value = SignedOperation(OperationCode::ICastFloat, is_signed, PRECISE, value);
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value = ConvertIntegerSize(value, instr.conversion.dst_size, is_signed);
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SetRegister(bb, instr.gpr0, value);
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break;
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}
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default:
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UNIMPLEMENTED_MSG("Unhandled conversion instruction: {}", opcode->get().GetName());
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}
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return pc;
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}
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} // namespace VideoCommon::Shader
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