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504 lines
18 KiB
C++
504 lines
18 KiB
C++
// Copyright 2019 yuzu Emulator Project
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// Licensed under GPLv2 or any later version
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// Refer to the license.txt file included.
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#include <algorithm>
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#include <vector>
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#include <fmt/format.h>
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#include "common/assert.h"
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#include "common/bit_field.h"
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#include "common/common_types.h"
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#include "common/logging/log.h"
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#include "video_core/engines/shader_bytecode.h"
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#include "video_core/shader/node_helper.h"
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#include "video_core/shader/shader_ir.h"
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#include "video_core/textures/texture.h"
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namespace VideoCommon::Shader {
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using Tegra::Shader::Instruction;
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using Tegra::Shader::OpCode;
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using Tegra::Shader::PredCondition;
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using Tegra::Shader::StoreType;
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using Tegra::Texture::ComponentType;
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using Tegra::Texture::TextureFormat;
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using Tegra::Texture::TICEntry;
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namespace {
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ComponentType GetComponentType(Tegra::Engines::SamplerDescriptor descriptor,
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std::size_t component) {
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const TextureFormat format{descriptor.format};
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switch (format) {
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case TextureFormat::R16_G16_B16_A16:
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case TextureFormat::R32_G32_B32_A32:
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case TextureFormat::R32_G32_B32:
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case TextureFormat::R32_G32:
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case TextureFormat::R16_G16:
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case TextureFormat::R32:
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case TextureFormat::R16:
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case TextureFormat::R8:
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case TextureFormat::R1:
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if (component == 0) {
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return descriptor.r_type;
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}
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if (component == 1) {
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return descriptor.g_type;
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}
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if (component == 2) {
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return descriptor.b_type;
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}
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if (component == 3) {
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return descriptor.a_type;
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}
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break;
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case TextureFormat::A8R8G8B8:
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if (component == 0) {
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return descriptor.a_type;
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}
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if (component == 1) {
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return descriptor.r_type;
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}
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if (component == 2) {
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return descriptor.g_type;
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}
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if (component == 3) {
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return descriptor.b_type;
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}
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break;
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case TextureFormat::A2B10G10R10:
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case TextureFormat::A4B4G4R4:
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case TextureFormat::A5B5G5R1:
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case TextureFormat::A1B5G5R5:
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if (component == 0) {
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return descriptor.a_type;
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}
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if (component == 1) {
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return descriptor.b_type;
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}
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if (component == 2) {
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return descriptor.g_type;
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}
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if (component == 3) {
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return descriptor.r_type;
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}
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break;
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case TextureFormat::R32_B24G8:
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if (component == 0) {
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return descriptor.r_type;
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}
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if (component == 1) {
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return descriptor.b_type;
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}
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if (component == 2) {
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return descriptor.g_type;
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}
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break;
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case TextureFormat::B5G6R5:
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case TextureFormat::B6G5R5:
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if (component == 0) {
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return descriptor.b_type;
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}
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if (component == 1) {
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return descriptor.g_type;
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}
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if (component == 2) {
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return descriptor.r_type;
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}
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break;
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case TextureFormat::G8R24:
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case TextureFormat::G24R8:
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case TextureFormat::G8R8:
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case TextureFormat::G4R4:
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if (component == 0) {
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return descriptor.g_type;
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}
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if (component == 1) {
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return descriptor.r_type;
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}
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break;
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}
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UNIMPLEMENTED_MSG("texture format not implement={}", format);
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return ComponentType::FLOAT;
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}
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bool IsComponentEnabled(std::size_t component_mask, std::size_t component) {
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constexpr u8 R = 0b0001;
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constexpr u8 G = 0b0010;
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constexpr u8 B = 0b0100;
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constexpr u8 A = 0b1000;
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constexpr std::array<u8, 16> mask = {
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0, (R), (G), (R | G), (B), (R | B), (G | B), (R | G | B),
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(A), (R | A), (G | A), (R | G | A), (B | A), (R | B | A), (G | B | A), (R | G | B | A)};
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return std::bitset<4>{mask.at(component_mask)}.test(component);
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}
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u32 GetComponentSize(TextureFormat format, std::size_t component) {
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switch (format) {
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case TextureFormat::R32_G32_B32_A32:
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return 32;
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case TextureFormat::R16_G16_B16_A16:
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return 16;
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case TextureFormat::R32_G32_B32:
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return (component == 0 || component == 1 || component == 2) ? 32 : 0;
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case TextureFormat::R32_G32:
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return (component == 0 || component == 1) ? 32 : 0;
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case TextureFormat::R16_G16:
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return (component == 0 || component == 1) ? 16 : 0;
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case TextureFormat::R32:
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return (component == 0) ? 32 : 0;
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case TextureFormat::R16:
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return (component == 0) ? 16 : 0;
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case TextureFormat::R8:
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return (component == 0) ? 8 : 0;
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case TextureFormat::R1:
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return (component == 0) ? 1 : 0;
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case TextureFormat::A8R8G8B8:
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return 8;
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case TextureFormat::A2B10G10R10:
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return (component == 3 || component == 2 || component == 1) ? 10 : 2;
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case TextureFormat::A4B4G4R4:
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return 4;
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case TextureFormat::A5B5G5R1:
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return (component == 0 || component == 1 || component == 2) ? 5 : 1;
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case TextureFormat::A1B5G5R5:
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return (component == 1 || component == 2 || component == 3) ? 5 : 1;
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case TextureFormat::R32_B24G8:
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if (component == 0) {
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return 32;
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}
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if (component == 1) {
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return 24;
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}
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if (component == 2) {
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return 8;
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}
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return 0;
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case TextureFormat::B5G6R5:
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if (component == 0 || component == 2) {
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return 5;
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}
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if (component == 1) {
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return 6;
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}
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return 0;
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case TextureFormat::B6G5R5:
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if (component == 1 || component == 2) {
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return 5;
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}
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if (component == 0) {
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return 6;
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}
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return 0;
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case TextureFormat::G8R24:
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if (component == 0) {
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return 8;
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}
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if (component == 1) {
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return 24;
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}
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return 0;
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case TextureFormat::G24R8:
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if (component == 0) {
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return 8;
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}
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if (component == 1) {
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return 24;
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}
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return 0;
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case TextureFormat::G8R8:
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return (component == 0 || component == 1) ? 8 : 0;
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case TextureFormat::G4R4:
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return (component == 0 || component == 1) ? 4 : 0;
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default:
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UNIMPLEMENTED_MSG("texture format not implement={}", format);
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return 0;
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}
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}
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std::size_t GetImageComponentMask(TextureFormat format) {
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constexpr u8 R = 0b0001;
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constexpr u8 G = 0b0010;
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constexpr u8 B = 0b0100;
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constexpr u8 A = 0b1000;
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switch (format) {
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case TextureFormat::R32_G32_B32_A32:
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case TextureFormat::R16_G16_B16_A16:
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case TextureFormat::A8R8G8B8:
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case TextureFormat::A2B10G10R10:
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case TextureFormat::A4B4G4R4:
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case TextureFormat::A5B5G5R1:
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case TextureFormat::A1B5G5R5:
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return std::size_t{R | G | B | A};
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case TextureFormat::R32_G32_B32:
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case TextureFormat::R32_B24G8:
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case TextureFormat::B5G6R5:
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case TextureFormat::B6G5R5:
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return std::size_t{R | G | B};
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case TextureFormat::R32_G32:
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case TextureFormat::R16_G16:
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case TextureFormat::G8R24:
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case TextureFormat::G24R8:
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case TextureFormat::G8R8:
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case TextureFormat::G4R4:
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return std::size_t{R | G};
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case TextureFormat::R32:
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case TextureFormat::R16:
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case TextureFormat::R8:
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case TextureFormat::R1:
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return std::size_t{R};
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default:
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UNIMPLEMENTED_MSG("texture format not implement={}", format);
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return std::size_t{R | G | B | A};
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}
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}
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std::size_t GetImageTypeNumCoordinates(Tegra::Shader::ImageType image_type) {
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switch (image_type) {
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case Tegra::Shader::ImageType::Texture1D:
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case Tegra::Shader::ImageType::TextureBuffer:
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return 1;
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case Tegra::Shader::ImageType::Texture1DArray:
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case Tegra::Shader::ImageType::Texture2D:
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return 2;
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case Tegra::Shader::ImageType::Texture2DArray:
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case Tegra::Shader::ImageType::Texture3D:
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return 3;
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}
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UNREACHABLE();
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return 1;
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}
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} // Anonymous namespace
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u32 ShaderIR::DecodeImage(NodeBlock& bb, u32 pc) {
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const Instruction instr = {program_code[pc]};
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const auto opcode = OpCode::Decode(instr);
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const auto GetCoordinates = [this, instr](Tegra::Shader::ImageType image_type) {
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std::vector<Node> coords;
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const std::size_t num_coords{GetImageTypeNumCoordinates(image_type)};
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coords.reserve(num_coords);
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for (std::size_t i = 0; i < num_coords; ++i) {
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coords.push_back(GetRegister(instr.gpr8.Value() + i));
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}
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return coords;
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};
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switch (opcode->get().GetId()) {
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case OpCode::Id::SULD: {
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UNIMPLEMENTED_IF(instr.suldst.out_of_bounds_store !=
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Tegra::Shader::OutOfBoundsStore::Ignore);
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const auto type{instr.suldst.image_type};
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auto& image{instr.suldst.is_immediate ? GetImage(instr.image, type)
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: GetBindlessImage(instr.gpr39, type)};
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image.MarkRead();
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if (instr.suldst.mode == Tegra::Shader::SurfaceDataMode::P) {
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u32 indexer = 0;
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for (u32 element = 0; element < 4; ++element) {
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if (!instr.suldst.IsComponentEnabled(element)) {
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continue;
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}
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MetaImage meta{image, {}, element};
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Node value = Operation(OperationCode::ImageLoad, meta, GetCoordinates(type));
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SetTemporary(bb, indexer++, std::move(value));
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}
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for (u32 i = 0; i < indexer; ++i) {
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SetRegister(bb, instr.gpr0.Value() + i, GetTemporary(i));
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}
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} else if (instr.suldst.mode == Tegra::Shader::SurfaceDataMode::D_BA) {
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UNIMPLEMENTED_IF(instr.suldst.GetStoreDataLayout() != StoreType::Bits32);
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auto descriptor = [this, instr] {
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std::optional<Tegra::Engines::SamplerDescriptor> descriptor;
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if (instr.suldst.is_immediate) {
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descriptor = registry.ObtainBoundSampler(instr.image.index.Value());
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} else {
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const Node image_register = GetRegister(instr.gpr39);
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const auto [base_image, buffer, offset] = TrackCbuf(
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image_register, global_code, static_cast<s64>(global_code.size()));
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descriptor = registry.ObtainBindlessSampler(buffer, offset);
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}
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if (!descriptor) {
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UNREACHABLE_MSG("Failed to obtain image descriptor");
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}
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return *descriptor;
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}();
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const auto comp_mask = GetImageComponentMask(descriptor.format);
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// TODO(namkazt): let's suppose image format is same as store type. we check on it
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// later.
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switch (instr.suldst.GetStoreDataLayout()) {
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case StoreType::Bits32: {
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u32 shifted_counter = 0;
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// value should be RGBA format
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Node value = Immediate(0);
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for (u32 element = 0; element < 4; ++element) {
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if (!IsComponentEnabled(comp_mask, element)) {
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continue;
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}
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const auto component_type = GetComponentType(descriptor, element);
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const auto component_size = GetComponentSize(descriptor.format, element);
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bool is_signed = true;
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MetaImage meta{image, {}, element};
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const Node original_value =
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Operation(OperationCode::ImageLoad, meta, GetCoordinates(type));
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Node converted_value = [&] {
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switch (component_type) {
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case ComponentType::SNORM: {
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// range [-1.0, 1.0]
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auto cnv_value =
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Operation(OperationCode::FAdd, original_value, Immediate(1.f));
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cnv_value = Operation(OperationCode::FMul, std::move(cnv_value),
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Immediate(127.f));
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is_signed = false;
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return SignedOperation(OperationCode::ICastFloat, is_signed,
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std::move(cnv_value));
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}
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case ComponentType::UNORM: {
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// range [0.0, 1.0]
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auto cnv_value =
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Operation(OperationCode::FMul, original_value, Immediate(255.f));
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is_signed = false;
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return SignedOperation(OperationCode::ICastFloat, is_signed,
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std::move(cnv_value));
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}
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case ComponentType::SINT: // range [-128,128]
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return Operation(OperationCode::IAdd, original_value, Immediate(128));
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case ComponentType::UINT: // range [0, 255]
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is_signed = false;
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return original_value;
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case ComponentType::FLOAT:
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return original_value;
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default:
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UNIMPLEMENTED_MSG("Unimplement component type={}", component_type);
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return original_value;
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}
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}();
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// shift element to correct position
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const auto shifted = shifted_counter;
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if (shifted > 0) {
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converted_value =
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SignedOperation(OperationCode::ILogicalShiftLeft, is_signed,
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std::move(converted_value), Immediate(shifted));
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}
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shifted_counter += component_size;
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// add value into result
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value = Operation(OperationCode::UBitwiseOr, value, std::move(converted_value));
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}
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SetRegister(bb, instr.gpr0.Value(), std::move(value));
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break;
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}
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default:
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UNREACHABLE();
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break;
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}
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}
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break;
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}
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case OpCode::Id::SUST: {
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UNIMPLEMENTED_IF(instr.suldst.mode != Tegra::Shader::SurfaceDataMode::P);
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UNIMPLEMENTED_IF(instr.suldst.out_of_bounds_store !=
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Tegra::Shader::OutOfBoundsStore::Ignore);
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UNIMPLEMENTED_IF(instr.suldst.component_mask_selector != 0xf); // Ensure we have RGBA
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std::vector<Node> values;
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constexpr std::size_t hardcoded_size{4};
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for (std::size_t i = 0; i < hardcoded_size; ++i) {
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values.push_back(GetRegister(instr.gpr0.Value() + i));
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}
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const auto type{instr.suldst.image_type};
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auto& image{instr.suldst.is_immediate ? GetImage(instr.image, type)
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: GetBindlessImage(instr.gpr39, type)};
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image.MarkWrite();
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MetaImage meta{image, std::move(values)};
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bb.push_back(Operation(OperationCode::ImageStore, meta, GetCoordinates(type)));
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break;
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}
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case OpCode::Id::SUATOM: {
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UNIMPLEMENTED_IF(instr.suatom_d.is_ba != 0);
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const OperationCode operation_code = [instr] {
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switch (instr.suatom_d.operation_type) {
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case Tegra::Shader::ImageAtomicOperationType::S32:
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case Tegra::Shader::ImageAtomicOperationType::U32:
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switch (instr.suatom_d.operation) {
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case Tegra::Shader::ImageAtomicOperation::Add:
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return OperationCode::AtomicImageAdd;
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case Tegra::Shader::ImageAtomicOperation::And:
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return OperationCode::AtomicImageAnd;
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case Tegra::Shader::ImageAtomicOperation::Or:
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return OperationCode::AtomicImageOr;
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case Tegra::Shader::ImageAtomicOperation::Xor:
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return OperationCode::AtomicImageXor;
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case Tegra::Shader::ImageAtomicOperation::Exch:
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return OperationCode::AtomicImageExchange;
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}
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default:
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break;
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}
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UNIMPLEMENTED_MSG("Unimplemented operation={} type={}",
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static_cast<u64>(instr.suatom_d.operation.Value()),
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static_cast<u64>(instr.suatom_d.operation_type.Value()));
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return OperationCode::AtomicImageAdd;
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}();
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Node value = GetRegister(instr.gpr0);
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const auto type = instr.suatom_d.image_type;
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auto& image = GetImage(instr.image, type);
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image.MarkAtomic();
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MetaImage meta{image, {std::move(value)}};
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SetRegister(bb, instr.gpr0, Operation(operation_code, meta, GetCoordinates(type)));
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break;
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}
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default:
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UNIMPLEMENTED_MSG("Unhandled image instruction: {}", opcode->get().GetName());
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}
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return pc;
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}
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Image& ShaderIR::GetImage(Tegra::Shader::Image image, Tegra::Shader::ImageType type) {
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const auto offset = static_cast<u32>(image.index.Value());
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const auto it =
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std::find_if(std::begin(used_images), std::end(used_images),
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[offset](const Image& entry) { return entry.GetOffset() == offset; });
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if (it != std::end(used_images)) {
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ASSERT(!it->IsBindless() && it->GetType() == it->GetType());
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return *it;
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}
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const auto next_index = static_cast<u32>(used_images.size());
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return used_images.emplace_back(next_index, offset, type);
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}
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Image& ShaderIR::GetBindlessImage(Tegra::Shader::Register reg, Tegra::Shader::ImageType type) {
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const Node image_register = GetRegister(reg);
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const auto [base_image, buffer, offset] =
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TrackCbuf(image_register, global_code, static_cast<s64>(global_code.size()));
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const auto it =
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std::find_if(std::begin(used_images), std::end(used_images),
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[buffer = buffer, offset = offset](const Image& entry) {
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return entry.GetBuffer() == buffer && entry.GetOffset() == offset;
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});
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if (it != std::end(used_images)) {
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ASSERT(it->IsBindless() && it->GetType() == it->GetType());
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return *it;
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}
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const auto next_index = static_cast<u32>(used_images.size());
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return used_images.emplace_back(next_index, offset, buffer, type);
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}
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} // namespace VideoCommon::Shader
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