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70624e1c1d
This was initially necessary when AArch64 JIT emulation was in its infancy and all memory-related instructions weren't implemented. Given the JIT now has all of these facilities implemented, we can remove these functions from the CPU interface.
84 lines
2.8 KiB
C++
84 lines
2.8 KiB
C++
// Copyright 2018 yuzu emulator team
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// Licensed under GPLv2 or any later version
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// Refer to the license.txt file included.
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#pragma once
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#include <memory>
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#include <dynarmic/A64/a64.h>
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#include <dynarmic/A64/exclusive_monitor.h>
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#include "common/common_types.h"
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#include "core/arm/arm_interface.h"
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#include "core/arm/exclusive_monitor.h"
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#include "core/arm/unicorn/arm_unicorn.h"
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namespace Core {
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class ARM_Dynarmic_Callbacks;
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class DynarmicExclusiveMonitor;
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class System;
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class ARM_Dynarmic final : public ARM_Interface {
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public:
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ARM_Dynarmic(System& system, ExclusiveMonitor& exclusive_monitor, std::size_t core_index);
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~ARM_Dynarmic() override;
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void SetPC(u64 pc) override;
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u64 GetPC() const override;
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u64 GetReg(int index) const override;
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void SetReg(int index, u64 value) override;
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u128 GetVectorReg(int index) const override;
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void SetVectorReg(int index, u128 value) override;
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u32 GetPSTATE() const override;
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void SetPSTATE(u32 pstate) override;
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void Run() override;
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void Step() override;
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VAddr GetTlsAddress() const override;
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void SetTlsAddress(VAddr address) override;
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void SetTPIDR_EL0(u64 value) override;
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u64 GetTPIDR_EL0() const override;
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void SaveContext(ThreadContext& ctx) override;
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void LoadContext(const ThreadContext& ctx) override;
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void PrepareReschedule() override;
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void ClearExclusiveState() override;
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void ClearInstructionCache() override;
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void PageTableChanged(Common::PageTable& new_page_table,
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std::size_t new_address_space_size_in_bits) override;
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private:
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std::unique_ptr<Dynarmic::A64::Jit> MakeJit(Common::PageTable& page_table,
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std::size_t address_space_bits) const;
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friend class ARM_Dynarmic_Callbacks;
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std::unique_ptr<ARM_Dynarmic_Callbacks> cb;
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std::unique_ptr<Dynarmic::A64::Jit> jit;
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ARM_Unicorn inner_unicorn;
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std::size_t core_index;
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System& system;
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DynarmicExclusiveMonitor& exclusive_monitor;
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};
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class DynarmicExclusiveMonitor final : public ExclusiveMonitor {
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public:
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explicit DynarmicExclusiveMonitor(std::size_t core_count);
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~DynarmicExclusiveMonitor() override;
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void SetExclusive(std::size_t core_index, VAddr addr) override;
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void ClearExclusive() override;
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bool ExclusiveWrite8(std::size_t core_index, VAddr vaddr, u8 value) override;
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bool ExclusiveWrite16(std::size_t core_index, VAddr vaddr, u16 value) override;
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bool ExclusiveWrite32(std::size_t core_index, VAddr vaddr, u32 value) override;
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bool ExclusiveWrite64(std::size_t core_index, VAddr vaddr, u64 value) override;
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bool ExclusiveWrite128(std::size_t core_index, VAddr vaddr, u128 value) override;
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private:
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friend class ARM_Dynarmic;
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Dynarmic::A64::ExclusiveMonitor monitor;
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};
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} // namespace Core
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