mirror of
https://git.suyu.dev/suyu/suyu.git
synced 2024-11-24 20:36:24 -05:00
ba38d91fe2
* Implemented the puller semaphore operations. * Nit: Fix 2 style issues * Nit: Add Break to default case. * Fix style. * Update for comments. Added ReferenceCount method * Forgot to remove GpuSmaphoreAddress union. * Fix the clang-format issues. * More clang formatting. * two more white spaces for the Clang formatting. * Move puller members into the regs union * Updated to use Memory::WriteBlock instead of Memory::Write* * Fix clang style issues * White space clang error * Removing unused funcitons and other pr comment * Removing unused funcitons and other pr comment * More union magic for setting regs value. * union magic refcnt as well * Remove local var * Set up the regs and regs_assert_positions up properly * Fix clang error
334 lines
11 KiB
C++
334 lines
11 KiB
C++
// Copyright 2018 yuzu Emulator Project
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// Licensed under GPLv2 or any later version
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// Refer to the license.txt file included.
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#include "common/assert.h"
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#include "core/core_timing.h"
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#include "core/memory.h"
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#include "video_core/engines/fermi_2d.h"
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#include "video_core/engines/kepler_memory.h"
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#include "video_core/engines/maxwell_3d.h"
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#include "video_core/engines/maxwell_compute.h"
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#include "video_core/engines/maxwell_dma.h"
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#include "video_core/gpu.h"
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#include "video_core/rasterizer_interface.h"
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namespace Tegra {
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u32 FramebufferConfig::BytesPerPixel(PixelFormat format) {
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switch (format) {
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case PixelFormat::ABGR8:
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return 4;
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default:
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return 4;
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}
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UNREACHABLE();
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}
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GPU::GPU(VideoCore::RasterizerInterface& rasterizer) {
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memory_manager = std::make_unique<Tegra::MemoryManager>();
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dma_pusher = std::make_unique<Tegra::DmaPusher>(*this);
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maxwell_3d = std::make_unique<Engines::Maxwell3D>(rasterizer, *memory_manager);
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fermi_2d = std::make_unique<Engines::Fermi2D>(rasterizer, *memory_manager);
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maxwell_compute = std::make_unique<Engines::MaxwellCompute>();
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maxwell_dma = std::make_unique<Engines::MaxwellDMA>(rasterizer, *memory_manager);
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kepler_memory = std::make_unique<Engines::KeplerMemory>(rasterizer, *memory_manager);
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}
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GPU::~GPU() = default;
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Engines::Maxwell3D& GPU::Maxwell3D() {
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return *maxwell_3d;
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}
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const Engines::Maxwell3D& GPU::Maxwell3D() const {
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return *maxwell_3d;
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}
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MemoryManager& GPU::MemoryManager() {
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return *memory_manager;
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}
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const MemoryManager& GPU::MemoryManager() const {
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return *memory_manager;
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}
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DmaPusher& GPU::DmaPusher() {
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return *dma_pusher;
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}
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const DmaPusher& GPU::DmaPusher() const {
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return *dma_pusher;
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}
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u32 RenderTargetBytesPerPixel(RenderTargetFormat format) {
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ASSERT(format != RenderTargetFormat::NONE);
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switch (format) {
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case RenderTargetFormat::RGBA32_FLOAT:
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case RenderTargetFormat::RGBA32_UINT:
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return 16;
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case RenderTargetFormat::RGBA16_UINT:
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case RenderTargetFormat::RGBA16_UNORM:
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case RenderTargetFormat::RGBA16_FLOAT:
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case RenderTargetFormat::RG32_FLOAT:
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case RenderTargetFormat::RG32_UINT:
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return 8;
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case RenderTargetFormat::RGBA8_UNORM:
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case RenderTargetFormat::RGBA8_SNORM:
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case RenderTargetFormat::RGBA8_SRGB:
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case RenderTargetFormat::RGBA8_UINT:
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case RenderTargetFormat::RGB10_A2_UNORM:
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case RenderTargetFormat::BGRA8_UNORM:
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case RenderTargetFormat::BGRA8_SRGB:
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case RenderTargetFormat::RG16_UNORM:
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case RenderTargetFormat::RG16_SNORM:
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case RenderTargetFormat::RG16_UINT:
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case RenderTargetFormat::RG16_SINT:
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case RenderTargetFormat::RG16_FLOAT:
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case RenderTargetFormat::R32_FLOAT:
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case RenderTargetFormat::R11G11B10_FLOAT:
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case RenderTargetFormat::R32_UINT:
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return 4;
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case RenderTargetFormat::R16_UNORM:
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case RenderTargetFormat::R16_SNORM:
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case RenderTargetFormat::R16_UINT:
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case RenderTargetFormat::R16_SINT:
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case RenderTargetFormat::R16_FLOAT:
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case RenderTargetFormat::RG8_UNORM:
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case RenderTargetFormat::RG8_SNORM:
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return 2;
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case RenderTargetFormat::R8_UNORM:
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case RenderTargetFormat::R8_UINT:
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return 1;
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default:
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UNIMPLEMENTED_MSG("Unimplemented render target format {}", static_cast<u32>(format));
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return 1;
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}
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}
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u32 DepthFormatBytesPerPixel(DepthFormat format) {
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switch (format) {
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case DepthFormat::Z32_S8_X24_FLOAT:
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return 8;
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case DepthFormat::Z32_FLOAT:
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case DepthFormat::S8_Z24_UNORM:
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case DepthFormat::Z24_X8_UNORM:
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case DepthFormat::Z24_S8_UNORM:
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case DepthFormat::Z24_C8_UNORM:
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return 4;
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case DepthFormat::Z16_UNORM:
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return 2;
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default:
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UNIMPLEMENTED_MSG("Unimplemented Depth format {}", static_cast<u32>(format));
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return 1;
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}
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}
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// Note that, traditionally, methods are treated as 4-byte addressable locations, and hence
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// their numbers are written down multiplied by 4 in Docs. Here we are not multiply by 4.
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// So the values you see in docs might be multiplied by 4.
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enum class BufferMethods {
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BindObject = 0x0,
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Nop = 0x2,
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SemaphoreAddressHigh = 0x4,
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SemaphoreAddressLow = 0x5,
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SemaphoreSequence = 0x6,
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SemaphoreTrigger = 0x7,
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NotifyIntr = 0x8,
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WrcacheFlush = 0x9,
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Unk28 = 0xA,
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Unk2c = 0xB,
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RefCnt = 0x14,
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SemaphoreAcquire = 0x1A,
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SemaphoreRelease = 0x1B,
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Unk70 = 0x1C,
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Unk74 = 0x1D,
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Unk78 = 0x1E,
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Unk7c = 0x1F,
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Yield = 0x20,
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NonPullerMethods = 0x40,
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};
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enum class GpuSemaphoreOperation {
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AcquireEqual = 0x1,
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WriteLong = 0x2,
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AcquireGequal = 0x4,
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AcquireMask = 0x8,
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};
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void GPU::CallMethod(const MethodCall& method_call) {
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LOG_TRACE(HW_GPU, "Processing method {:08X} on subchannel {}", method_call.method,
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method_call.subchannel);
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ASSERT(method_call.subchannel < bound_engines.size());
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if (ExecuteMethodOnEngine(method_call)) {
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CallEngineMethod(method_call);
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} else {
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CallPullerMethod(method_call);
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}
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}
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bool GPU::ExecuteMethodOnEngine(const MethodCall& method_call) {
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const auto method = static_cast<BufferMethods>(method_call.method);
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return method >= BufferMethods::NonPullerMethods;
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}
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void GPU::CallPullerMethod(const MethodCall& method_call) {
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regs.reg_array[method_call.method] = method_call.argument;
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const auto method = static_cast<BufferMethods>(method_call.method);
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switch (method) {
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case BufferMethods::BindObject: {
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ProcessBindMethod(method_call);
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break;
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}
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case BufferMethods::Nop:
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case BufferMethods::SemaphoreAddressHigh:
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case BufferMethods::SemaphoreAddressLow:
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case BufferMethods::SemaphoreSequence:
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case BufferMethods::RefCnt:
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break;
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case BufferMethods::SemaphoreTrigger: {
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ProcessSemaphoreTriggerMethod();
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break;
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}
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case BufferMethods::NotifyIntr: {
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// TODO(Kmather73): Research and implement this method.
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LOG_ERROR(HW_GPU, "Special puller engine method NotifyIntr not implemented");
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break;
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}
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case BufferMethods::WrcacheFlush: {
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// TODO(Kmather73): Research and implement this method.
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LOG_ERROR(HW_GPU, "Special puller engine method WrcacheFlush not implemented");
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break;
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}
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case BufferMethods::Unk28: {
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// TODO(Kmather73): Research and implement this method.
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LOG_ERROR(HW_GPU, "Special puller engine method Unk28 not implemented");
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break;
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}
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case BufferMethods::Unk2c: {
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// TODO(Kmather73): Research and implement this method.
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LOG_ERROR(HW_GPU, "Special puller engine method Unk2c not implemented");
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break;
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}
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case BufferMethods::SemaphoreAcquire: {
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ProcessSemaphoreAcquire();
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break;
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}
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case BufferMethods::SemaphoreRelease: {
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ProcessSemaphoreRelease();
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break;
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}
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case BufferMethods::Yield: {
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// TODO(Kmather73): Research and implement this method.
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LOG_ERROR(HW_GPU, "Special puller engine method Yield not implemented");
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break;
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}
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default:
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LOG_ERROR(HW_GPU, "Special puller engine method {:X} not implemented",
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static_cast<u32>(method));
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break;
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}
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}
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void GPU::CallEngineMethod(const MethodCall& method_call) {
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const EngineID engine = bound_engines[method_call.subchannel];
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switch (engine) {
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case EngineID::FERMI_TWOD_A:
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fermi_2d->CallMethod(method_call);
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break;
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case EngineID::MAXWELL_B:
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maxwell_3d->CallMethod(method_call);
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break;
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case EngineID::MAXWELL_COMPUTE_B:
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maxwell_compute->CallMethod(method_call);
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break;
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case EngineID::MAXWELL_DMA_COPY_A:
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maxwell_dma->CallMethod(method_call);
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break;
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case EngineID::KEPLER_INLINE_TO_MEMORY_B:
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kepler_memory->CallMethod(method_call);
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break;
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default:
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UNIMPLEMENTED_MSG("Unimplemented engine");
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}
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}
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void GPU::ProcessBindMethod(const MethodCall& method_call) {
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// Bind the current subchannel to the desired engine id.
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LOG_DEBUG(HW_GPU, "Binding subchannel {} to engine {}", method_call.subchannel,
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method_call.argument);
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bound_engines[method_call.subchannel] = static_cast<EngineID>(method_call.argument);
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}
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void GPU::ProcessSemaphoreTriggerMethod() {
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const auto semaphoreOperationMask = 0xF;
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const auto op =
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static_cast<GpuSemaphoreOperation>(regs.semaphore_trigger & semaphoreOperationMask);
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if (op == GpuSemaphoreOperation::WriteLong) {
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auto address = memory_manager->GpuToCpuAddress(regs.smaphore_address.SmaphoreAddress());
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struct Block {
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u32 sequence;
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u32 zeros = 0;
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u64 timestamp;
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};
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Block block{};
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block.sequence = regs.semaphore_sequence;
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// TODO(Kmather73): Generate a real GPU timestamp and write it here instead of
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// CoreTiming
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block.timestamp = CoreTiming::GetTicks();
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Memory::WriteBlock(*address, &block, sizeof(block));
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} else {
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const auto address =
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memory_manager->GpuToCpuAddress(regs.smaphore_address.SmaphoreAddress());
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const u32 word = Memory::Read32(*address);
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if ((op == GpuSemaphoreOperation::AcquireEqual && word == regs.semaphore_sequence) ||
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(op == GpuSemaphoreOperation::AcquireGequal &&
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static_cast<s32>(word - regs.semaphore_sequence) > 0) ||
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(op == GpuSemaphoreOperation::AcquireMask && (word & regs.semaphore_sequence))) {
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// Nothing to do in this case
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} else {
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regs.acquire_source = true;
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regs.acquire_value = regs.semaphore_sequence;
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if (op == GpuSemaphoreOperation::AcquireEqual) {
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regs.acquire_active = true;
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regs.acquire_mode = false;
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} else if (op == GpuSemaphoreOperation::AcquireGequal) {
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regs.acquire_active = true;
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regs.acquire_mode = true;
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} else if (op == GpuSemaphoreOperation::AcquireMask) {
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// TODO(kemathe) The acquire mask operation waits for a value that, ANDed with
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// semaphore_sequence, gives a non-0 result
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LOG_ERROR(HW_GPU, "Invalid semaphore operation AcquireMask not implemented");
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} else {
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LOG_ERROR(HW_GPU, "Invalid semaphore operation");
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}
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}
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}
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}
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void GPU::ProcessSemaphoreRelease() {
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const auto address = memory_manager->GpuToCpuAddress(regs.smaphore_address.SmaphoreAddress());
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Memory::Write32(*address, regs.semaphore_release);
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}
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void GPU::ProcessSemaphoreAcquire() {
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const auto address = memory_manager->GpuToCpuAddress(regs.smaphore_address.SmaphoreAddress());
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const u32 word = Memory::Read32(*address);
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const auto value = regs.semaphore_acquire;
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if (word != value) {
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regs.acquire_active = true;
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regs.acquire_value = value;
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// TODO(kemathe73) figure out how to do the acquire_timeout
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regs.acquire_mode = false;
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regs.acquire_source = false;
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}
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}
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} // namespace Tegra
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