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https://git.suyu.dev/suyu/suyu.git
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Stop using reserved operator names (and/or/xor) with Xbyak
Also has the Dynarmic upgrade with the same change
This commit is contained in:
parent
da1bec121a
commit
f6715f98f5
3 changed files with 15 additions and 17 deletions
4
externals/CMakeLists.txt
vendored
4
externals/CMakeLists.txt
vendored
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@ -46,7 +46,5 @@ if (ARCHITECTURE_x86_64)
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# Defined before "dynarmic" above
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# Defined before "dynarmic" above
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# add_library(xbyak INTERFACE)
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# add_library(xbyak INTERFACE)
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target_include_directories(xbyak INTERFACE ./xbyak/xbyak)
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target_include_directories(xbyak INTERFACE ./xbyak/xbyak)
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if (NOT MSVC)
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target_compile_definitions(xbyak INTERFACE XBYAK_NO_OP_NAMES)
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target_compile_options(xbyak INTERFACE -fno-operator-names)
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endif()
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endif()
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endif()
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2
externals/dynarmic
vendored
2
externals/dynarmic
vendored
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@ -1 +1 @@
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Subproject commit 7707ff13e981b0aecf87f3156ee0b641469f7bb3
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Subproject commit 8f15e3f70cb96e56705e5de6ba97b5d09423a56b
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@ -321,27 +321,27 @@ void JitShader::Compile_EvaluateCondition(Instruction instr) {
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case Instruction::FlowControlType::Or:
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case Instruction::FlowControlType::Or:
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mov(eax, COND0);
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mov(eax, COND0);
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mov(ebx, COND1);
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mov(ebx, COND1);
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xor(eax, (instr.flow_control.refx.Value() ^ 1));
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xor_(eax, (instr.flow_control.refx.Value() ^ 1));
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xor(ebx, (instr.flow_control.refy.Value() ^ 1));
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xor_(ebx, (instr.flow_control.refy.Value() ^ 1));
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or (eax, ebx);
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or_(eax, ebx);
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break;
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break;
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case Instruction::FlowControlType::And:
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case Instruction::FlowControlType::And:
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mov(eax, COND0);
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mov(eax, COND0);
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mov(ebx, COND1);
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mov(ebx, COND1);
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xor(eax, (instr.flow_control.refx.Value() ^ 1));
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xor_(eax, (instr.flow_control.refx.Value() ^ 1));
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xor(ebx, (instr.flow_control.refy.Value() ^ 1));
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xor_(ebx, (instr.flow_control.refy.Value() ^ 1));
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and(eax, ebx);
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and_(eax, ebx);
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break;
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break;
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case Instruction::FlowControlType::JustX:
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case Instruction::FlowControlType::JustX:
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mov(eax, COND0);
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mov(eax, COND0);
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xor(eax, (instr.flow_control.refx.Value() ^ 1));
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xor_(eax, (instr.flow_control.refx.Value() ^ 1));
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break;
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break;
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case Instruction::FlowControlType::JustY:
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case Instruction::FlowControlType::JustY:
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mov(eax, COND1);
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mov(eax, COND1);
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xor(eax, (instr.flow_control.refy.Value() ^ 1));
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xor_(eax, (instr.flow_control.refy.Value() ^ 1));
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break;
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break;
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}
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}
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}
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}
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@ -734,10 +734,10 @@ void JitShader::Compile_LOOP(Instruction instr) {
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mov(LOOPCOUNT, dword[SETUP + offset]);
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mov(LOOPCOUNT, dword[SETUP + offset]);
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mov(LOOPCOUNT_REG, LOOPCOUNT);
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mov(LOOPCOUNT_REG, LOOPCOUNT);
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shr(LOOPCOUNT_REG, 4);
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shr(LOOPCOUNT_REG, 4);
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and(LOOPCOUNT_REG, 0xFF0); // Y-component is the start
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and_(LOOPCOUNT_REG, 0xFF0); // Y-component is the start
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mov(LOOPINC, LOOPCOUNT);
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mov(LOOPINC, LOOPCOUNT);
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shr(LOOPINC, 12);
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shr(LOOPINC, 12);
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and(LOOPINC, 0xFF0); // Z-component is the incrementer
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and_(LOOPINC, 0xFF0); // Z-component is the incrementer
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movzx(LOOPCOUNT, LOOPCOUNT.cvt8()); // X-component is iteration count
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movzx(LOOPCOUNT, LOOPCOUNT.cvt8()); // X-component is iteration count
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add(LOOPCOUNT, 1); // Iteration count is X-component + 1
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add(LOOPCOUNT, 1); // Iteration count is X-component + 1
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@ -858,9 +858,9 @@ void JitShader::Compile(const std::array<u32, MAX_PROGRAM_CODE_LENGTH>* program_
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mov(STATE, ABI_PARAM2);
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mov(STATE, ABI_PARAM2);
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// Zero address/loop registers
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// Zero address/loop registers
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xor(ADDROFFS_REG_0.cvt32(), ADDROFFS_REG_0.cvt32());
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xor_(ADDROFFS_REG_0.cvt32(), ADDROFFS_REG_0.cvt32());
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xor(ADDROFFS_REG_1.cvt32(), ADDROFFS_REG_1.cvt32());
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xor_(ADDROFFS_REG_1.cvt32(), ADDROFFS_REG_1.cvt32());
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xor(LOOPCOUNT_REG, LOOPCOUNT_REG);
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xor_(LOOPCOUNT_REG, LOOPCOUNT_REG);
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// Used to set a register to one
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// Used to set a register to one
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static const __m128 one = {1.f, 1.f, 1.f, 1.f};
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static const __m128 one = {1.f, 1.f, 1.f, 1.f};
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