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https://git.suyu.dev/suyu/suyu.git
synced 2024-11-24 12:26:26 -05:00
Implement Bindless Samplers and TEX_B in the IR.
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parent
c4ac05c82c
commit
e28fd3d0a5
4 changed files with 77 additions and 16 deletions
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@ -1309,6 +1309,7 @@ public:
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LDG, // Load from global memory
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STG, // Store in global memory
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TEX,
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TEX_B, // Texture Load Bindless
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TXQ, // Texture Query
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TEXS, // Texture Fetch with scalar/non-vec4 source/destinations
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TLDS, // Texture Load with scalar/non-vec4 source/destinations
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@ -1577,6 +1578,7 @@ private:
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INST("1110111011010---", Id::LDG, Type::Memory, "LDG"),
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INST("1110111011011---", Id::STG, Type::Memory, "STG"),
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INST("110000----111---", Id::TEX, Type::Texture, "TEX"),
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INST("1101111010111---", Id::TEX_B, Type::Texture, "TEX_B"),
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INST("1101111101001---", Id::TXQ, Type::Texture, "TXQ"),
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INST("1101-00---------", Id::TEXS, Type::Texture, "TEXS"),
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INST("1101101---------", Id::TLDS, Type::Texture, "TLDS"),
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@ -328,7 +328,7 @@ std::optional<ShaderDiskCacheDecompiled> ShaderDiskCacheOpenGL::LoadDecompiledEn
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}
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entry.entries.samplers.emplace_back(
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static_cast<std::size_t>(offset), static_cast<std::size_t>(index),
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static_cast<Tegra::Shader::TextureType>(type), is_array != 0, is_shadow != 0);
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static_cast<Tegra::Shader::TextureType>(type), is_array != 0, is_shadow != 0, false);
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}
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u32 global_memory_count{};
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@ -57,6 +57,23 @@ u32 ShaderIR::DecodeTexture(NodeBlock& bb, u32 pc) {
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GetTexCode(instr, texture_type, process_mode, depth_compare, is_array, is_aoffi));
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break;
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}
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case OpCode::Id::TEX_B: {
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UNIMPLEMENTED_IF_MSG(instr.tex.UsesMiscMode(TextureMiscMode::AOFFI),
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"AOFFI is not implemented");
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if (instr.tex.UsesMiscMode(TextureMiscMode::NODEP)) {
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LOG_WARNING(HW_GPU, "TEX.NODEP implementation is incomplete");
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}
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const TextureType texture_type{instr.tex.texture_type};
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const bool is_array = instr.tex.array != 0;
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const bool depth_compare = instr.tex.UsesMiscMode(TextureMiscMode::DC);
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const auto process_mode = instr.tex.GetTextureProcessMode();
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WriteTexInstructionFloat(bb, instr,
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GetTexCode(instr, texture_type, process_mode, depth_compare,
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is_array, true, instr.gpr20));
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break;
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}
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case OpCode::Id::TEXS: {
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const TextureType texture_type{instr.texs.GetTextureType()};
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const bool is_array{instr.texs.IsArrayTexture()};
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@ -250,10 +267,36 @@ const Sampler& ShaderIR::GetSampler(const Tegra::Shader::Sampler& sampler, Textu
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// Otherwise create a new mapping for this sampler
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const std::size_t next_index = used_samplers.size();
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const Sampler entry{offset, next_index, type, is_array, is_shadow};
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const Sampler entry{offset, next_index, type, is_array, is_shadow, false};
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return *used_samplers.emplace(entry).first;
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}
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const Sampler& ShaderIR::GetBindlessSampler(const Tegra::Shader::Register& reg,
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TextureType type, bool is_array, bool is_shadow) {
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const Node sampler_register = GetRegister(reg);
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const Node base_sampler = TrackCbuf(sampler_register, global_code, static_cast<s64>(global_code.size()));
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const auto cbuf = std::get_if<CbufNode>(base_sampler);
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const auto cbuf_offset_imm = std::get_if<ImmediateNode>(cbuf->GetOffset());
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ASSERT(cbuf_offset_imm != nullptr);
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const auto cbuf_offset = cbuf_offset_imm->GetValue();
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const auto cbuf_index = cbuf->GetIndex();
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const std::pair<u32, u32> cbuf_pair = {cbuf_index, cbuf_offset};
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// If this sampler has already been used, return the existing mapping.
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if (used_bindless_samplers.count(cbuf_pair) > 0) {
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const auto& sampler = used_bindless_samplers[cbuf_pair];
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ASSERT(sampler.GetType() == type && sampler.IsArray() == is_array &&
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sampler.IsShadow() == is_shadow);
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return sampler;
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}
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// Otherwise create a new mapping for this sampler
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const std::size_t next_index = used_bindless_samplers.size();
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const Sampler entry{0, next_index, type, is_array, is_shadow, true};
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return (*used_bindless_samplers.emplace(std::make_pair(cbuf_pair, entry)).first).second;
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}
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void ShaderIR::WriteTexInstructionFloat(NodeBlock& bb, Instruction instr, const Node4& components) {
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u32 dest_elem = 0;
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for (u32 elem = 0; elem < 4; ++elem) {
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@ -325,8 +368,8 @@ void ShaderIR::WriteTexsInstructionHalfFloat(NodeBlock& bb, Instruction instr,
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Node4 ShaderIR::GetTextureCode(Instruction instr, TextureType texture_type,
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TextureProcessMode process_mode, std::vector<Node> coords,
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Node array, Node depth_compare, u32 bias_offset,
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std::vector<Node> aoffi) {
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Node array, Node depth_compare, u32 bias_offset, std::vector<Node> aoffi, bool is_bindless,
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Register bindless_reg) {
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const bool is_array = array;
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const bool is_shadow = depth_compare;
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@ -334,7 +377,9 @@ Node4 ShaderIR::GetTextureCode(Instruction instr, TextureType texture_type,
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(texture_type == TextureType::TextureCube && is_array && is_shadow),
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"This method is not supported.");
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const auto& sampler = GetSampler(instr.sampler, texture_type, is_array, is_shadow);
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const auto& sampler = !is_bindless
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? GetSampler(instr.sampler, texture_type, is_array, is_shadow)
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: GetBindlessSampler(bindless_reg, texture_type, is_array, is_shadow);
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const bool lod_needed = process_mode == TextureProcessMode::LZ ||
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process_mode == TextureProcessMode::LL ||
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@ -384,7 +429,7 @@ Node4 ShaderIR::GetTextureCode(Instruction instr, TextureType texture_type,
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Node4 ShaderIR::GetTexCode(Instruction instr, TextureType texture_type,
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TextureProcessMode process_mode, bool depth_compare, bool is_array,
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bool is_aoffi) {
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bool is_aoffi, bool is_bindless, Register bindless_reg) {
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const bool lod_bias_enabled{
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(process_mode != TextureProcessMode::None && process_mode != TextureProcessMode::LZ)};
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@ -423,7 +468,8 @@ Node4 ShaderIR::GetTexCode(Instruction instr, TextureType texture_type,
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dc = GetRegister(parameter_register++);
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}
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return GetTextureCode(instr, texture_type, process_mode, coords, array, dc, 0, aoffi);
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return GetTextureCode(instr, texture_type, process_mode, coords, array, dc, 0, aoffi, is_bindless,
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bindless_reg);
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}
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Node4 ShaderIR::GetTexsCode(Instruction instr, TextureType texture_type,
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@ -196,9 +196,12 @@ enum class ExitMethod {
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class Sampler {
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public:
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Sampler() = default;
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explicit Sampler(std::size_t offset, std::size_t index, Tegra::Shader::TextureType type,
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bool is_array, bool is_shadow)
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: offset{offset}, index{index}, type{type}, is_array{is_array}, is_shadow{is_shadow} {}
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bool is_array, bool is_shadow, bool is_bindless)
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: offset{offset}, index{index}, type{type}, is_array{is_array}, is_shadow{is_shadow}, is_bindless{is_bindless} {}
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~Sampler() = default;
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std::size_t GetOffset() const {
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return offset;
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@ -233,6 +236,7 @@ private:
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Tegra::Shader::TextureType type{}; ///< The type used to sample this texture (Texture2D, etc)
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bool is_array{}; ///< Whether the texture is being sampled as an array texture or not.
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bool is_shadow{}; ///< Whether the texture is being sampled as a depth texture or not.
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bool is_bindless{}; ///< Whether this sampler belongs to a bindless texture or not.
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};
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class ConstBuffer {
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@ -730,6 +734,10 @@ private:
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const Sampler& GetSampler(const Tegra::Shader::Sampler& sampler,
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Tegra::Shader::TextureType type, bool is_array, bool is_shadow);
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// Accesses a texture sampler for a bindless texture.
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const Sampler& GetBindlessSampler(const Tegra::Shader::Register& reg, Tegra::Shader::TextureType type,
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bool is_array, bool is_shadow);
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/// Extracts a sequence of bits from a node
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Node BitfieldExtract(Node value, u32 offset, u32 bits);
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@ -741,9 +749,11 @@ private:
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void WriteTexsInstructionHalfFloat(NodeBlock& bb, Tegra::Shader::Instruction instr,
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const Node4& components);
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Node4 GetTexCode(Tegra::Shader::Instruction instr, Tegra::Shader::TextureType texture_type,
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Tegra::Shader::TextureProcessMode process_mode, bool depth_compare,
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bool is_array, bool is_aoffi);
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Node4 GetTexCode(
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Tegra::Shader::Instruction instr, Tegra::Shader::TextureType texture_type,
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Tegra::Shader::TextureProcessMode process_mode, bool depth_compare, bool is_array,
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bool is_aoffi, bool is_bindless = false,
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Tegra::Shader::Register bindless_reg = static_cast<Tegra::Shader::Register>(0));
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Node4 GetTexsCode(Tegra::Shader::Instruction instr, Tegra::Shader::TextureType texture_type,
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Tegra::Shader::TextureProcessMode process_mode, bool depth_compare,
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@ -760,10 +770,12 @@ private:
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bool lod_bias_enabled, std::size_t max_coords, std::size_t max_inputs);
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std::vector<Node> GetAoffiCoordinates(Node aoffi_reg, std::size_t coord_count, bool is_tld4);
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Node4 GetTextureCode(Tegra::Shader::Instruction instr, Tegra::Shader::TextureType texture_type,
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Tegra::Shader::TextureProcessMode process_mode, std::vector<Node> coords,
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Node array, Node depth_compare, u32 bias_offset, std::vector<Node> aoffi);
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Node4 GetTextureCode(
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Tegra::Shader::Instruction instr, Tegra::Shader::TextureType texture_type,
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Tegra::Shader::TextureProcessMode process_mode, std::vector<Node> coords, Node array,
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Node depth_compare, u32 bias_offset, std::vector<Node> aoffi, bool is_bindless = false,
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Tegra::Shader::Register bindless_reg = static_cast<Tegra::Shader::Register>(0));
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Node GetVideoOperand(Node op, bool is_chunk, bool is_signed, Tegra::Shader::VideoType type,
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u64 byte_height);
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@ -833,6 +845,7 @@ private:
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std::set<Tegra::Shader::Attribute::Index> used_output_attributes;
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std::map<u32, ConstBuffer> used_cbufs;
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std::set<Sampler> used_samplers;
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std::map<std::pair<u32, u32>, Sampler> used_bindless_samplers;
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std::array<bool, Tegra::Engines::Maxwell3D::Regs::NumClipDistances> used_clip_distances{};
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std::set<GlobalMemoryBase> used_global_memory_bases;
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