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https://git.suyu.dev/suyu/suyu.git
synced 2024-11-26 05:16:24 -05:00
shader/memory: Implement ATOM.ADD
ATOM operates atomically on global memory. For now only add ATOM.ADD since that's what was found in commercial games. This asserts for ATOM.ADD.S32 (handling the others as unimplemented), although ATOM.ADD.U32 shouldn't be any different. This change forces us to change the default type on SPIR-V storage buffers from float to uint. We could also alias the buffers, but it's simpler for now to just use uint. While we are at it, abstract the code to avoid repetition.
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05df4a8c94
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5 changed files with 86 additions and 39 deletions
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@ -227,6 +227,28 @@ enum class AtomicOp : u64 {
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Exch = 8,
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};
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enum class GlobalAtomicOp : u64 {
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Add = 0,
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Min = 1,
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Max = 2,
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Inc = 3,
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Dec = 4,
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And = 5,
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Or = 6,
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Xor = 7,
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Exch = 8,
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SafeAdd = 10,
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};
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enum class GlobalAtomicType : u64 {
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U32 = 0,
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S32 = 1,
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U64 = 2,
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F32_FTZ_RN = 3,
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F16x2_FTZ_RN = 4,
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S64 = 5,
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};
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enum class UniformType : u64 {
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UnsignedByte = 0,
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SignedByte = 1,
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@ -957,6 +979,12 @@ union Instruction {
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BitField<46, 2, u64> cache_mode;
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} stg;
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union {
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BitField<52, 4, GlobalAtomicOp> operation;
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BitField<49, 3, GlobalAtomicType> type;
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BitField<28, 20, s64> offset;
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} atom;
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union {
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BitField<52, 4, AtomicOp> operation;
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BitField<28, 2, AtomicType> type;
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@ -1690,6 +1718,7 @@ public:
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ST_S,
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ST, // Store in generic memory
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STG, // Store in global memory
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ATOM, // Atomic operation on global memory
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ATOMS, // Atomic operation on shared memory
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AL2P, // Transforms attribute memory into physical memory
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TEX,
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@ -1994,6 +2023,7 @@ private:
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INST("1110111101010---", Id::ST_L, Type::Memory, "ST_L"),
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INST("101-------------", Id::ST, Type::Memory, "ST"),
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INST("1110111011011---", Id::STG, Type::Memory, "STG"),
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INST("11101101--------", Id::ATOM, Type::Memory, "ATOM"),
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INST("11101100--------", Id::ATOMS, Type::Memory, "ATOMS"),
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INST("1110111110100---", Id::AL2P, Type::Memory, "AL2P"),
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INST("110000----111---", Id::TEX, Type::Texture, "TEX"),
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@ -1858,10 +1858,7 @@ private:
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template <const std::string_view& opname, Type type>
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Expression Atomic(Operation operation) {
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ASSERT(stage == ShaderType::Compute);
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auto& smem = std::get<SmemNode>(*operation[0]);
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return {fmt::format("atomic{}(smem[{} >> 2], {})", opname, Visit(smem.GetAddress()).AsInt(),
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return {fmt::format("atomic{}({}, {})", opname, Visit(operation[0]).GetCode(),
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Visit(operation[1]).As(type)),
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type};
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}
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@ -1123,15 +1123,7 @@ private:
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}
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if (const auto gmem = std::get_if<GmemNode>(&*node)) {
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const Id gmem_buffer = global_buffers.at(gmem->GetDescriptor());
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const Id real = AsUint(Visit(gmem->GetRealAddress()));
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const Id base = AsUint(Visit(gmem->GetBaseAddress()));
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Id offset = OpISub(t_uint, real, base);
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offset = OpUDiv(t_uint, offset, Constant(t_uint, 4U));
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return {OpLoad(t_float,
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OpAccessChain(t_gmem_float, gmem_buffer, Constant(t_uint, 0U), offset)),
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Type::Float};
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return {OpLoad(t_uint, GetGlobalMemoryPointer(*gmem)), Type::Uint};
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}
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if (const auto lmem = std::get_if<LmemNode>(&*node)) {
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@ -1142,10 +1134,7 @@ private:
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}
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if (const auto smem = std::get_if<SmemNode>(&*node)) {
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Id address = AsUint(Visit(smem->GetAddress()));
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address = OpShiftRightLogical(t_uint, address, Constant(t_uint, 2U));
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const Id pointer = OpAccessChain(t_smem_uint, shared_memory, address);
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return {OpLoad(t_uint, pointer), Type::Uint};
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return {OpLoad(t_uint, GetSharedMemoryPointer(*smem)), Type::Uint};
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}
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if (const auto internal_flag = std::get_if<InternalFlagNode>(&*node)) {
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@ -1339,20 +1328,10 @@ private:
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target = {OpAccessChain(t_prv_float, local_memory, address), Type::Float};
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} else if (const auto smem = std::get_if<SmemNode>(&*dest)) {
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ASSERT(stage == ShaderType::Compute);
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Id address = AsUint(Visit(smem->GetAddress()));
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address = OpShiftRightLogical(t_uint, address, Constant(t_uint, 2U));
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target = {OpAccessChain(t_smem_uint, shared_memory, address), Type::Uint};
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target = {GetSharedMemoryPointer(*smem), Type::Uint};
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} else if (const auto gmem = std::get_if<GmemNode>(&*dest)) {
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const Id real = AsUint(Visit(gmem->GetRealAddress()));
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const Id base = AsUint(Visit(gmem->GetBaseAddress()));
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const Id diff = OpISub(t_uint, real, base);
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const Id offset = OpShiftRightLogical(t_uint, diff, Constant(t_uint, 2));
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const Id gmem_buffer = global_buffers.at(gmem->GetDescriptor());
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target = {OpAccessChain(t_gmem_float, gmem_buffer, Constant(t_uint, 0), offset),
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Type::Float};
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target = {GetGlobalMemoryPointer(*gmem), Type::Uint};
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} else {
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UNIMPLEMENTED();
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@ -1804,11 +1783,16 @@ private:
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return {};
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}
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Expression UAtomicAdd(Operation operation) {
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const auto& smem = std::get<SmemNode>(*operation[0]);
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Id address = AsUint(Visit(smem.GetAddress()));
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address = OpShiftRightLogical(t_uint, address, Constant(t_uint, 2U));
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const Id pointer = OpAccessChain(t_smem_uint, shared_memory, address);
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Expression AtomicAdd(Operation operation) {
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Id pointer;
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if (const auto smem = std::get_if<SmemNode>(&*operation[0])) {
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pointer = GetSharedMemoryPointer(*smem);
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} else if (const auto gmem = std::get_if<GmemNode>(&*operation[0])) {
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pointer = GetGlobalMemoryPointer(*gmem);
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} else {
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UNREACHABLE();
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return {Constant(t_uint, 0), Type::Uint};
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}
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const Id scope = Constant(t_uint, static_cast<u32>(spv::Scope::Device));
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const Id semantics = Constant(t_uint, 0U);
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@ -2243,6 +2227,22 @@ private:
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return {};
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}
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Id GetGlobalMemoryPointer(const GmemNode& gmem) {
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const Id real = AsUint(Visit(gmem.GetRealAddress()));
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const Id base = AsUint(Visit(gmem.GetBaseAddress()));
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const Id diff = OpISub(t_uint, real, base);
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const Id offset = OpShiftRightLogical(t_uint, diff, Constant(t_uint, 2));
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const Id buffer = global_buffers.at(gmem.GetDescriptor());
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return OpAccessChain(t_gmem_uint, buffer, Constant(t_uint, 0), offset);
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}
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Id GetSharedMemoryPointer(const SmemNode& smem) {
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ASSERT(stage == ShaderType::Compute);
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Id address = AsUint(Visit(smem.GetAddress()));
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address = OpShiftRightLogical(t_uint, address, Constant(t_uint, 2U));
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return OpAccessChain(t_smem_uint, shared_memory, address);
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}
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static constexpr std::array operation_decompilers = {
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&SPIRVDecompiler::Assign,
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@ -2389,7 +2389,7 @@ private:
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&SPIRVDecompiler::AtomicImageXor,
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&SPIRVDecompiler::AtomicImageExchange,
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&SPIRVDecompiler::UAtomicAdd,
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&SPIRVDecompiler::AtomicAdd,
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&SPIRVDecompiler::Branch,
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&SPIRVDecompiler::BranchIndirect,
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@ -2485,9 +2485,9 @@ private:
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Id t_smem_uint{};
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const Id t_gmem_float = TypePointer(spv::StorageClass::StorageBuffer, t_float);
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const Id t_gmem_uint = TypePointer(spv::StorageClass::StorageBuffer, t_uint);
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const Id t_gmem_array =
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Name(Decorate(TypeRuntimeArray(t_float), spv::Decoration::ArrayStride, 4U), "GmemArray");
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Name(Decorate(TypeRuntimeArray(t_uint), spv::Decoration::ArrayStride, 4U), "GmemArray");
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const Id t_gmem_struct = MemberDecorate(
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Decorate(TypeStruct(t_gmem_array), spv::Decoration::Block), 0, spv::Decoration::Offset, 0);
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const Id t_gmem_ssbo = TypePointer(spv::StorageClass::StorageBuffer, t_gmem_struct);
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@ -19,6 +19,8 @@ namespace VideoCommon::Shader {
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using Tegra::Shader::AtomicOp;
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using Tegra::Shader::AtomicType;
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using Tegra::Shader::Attribute;
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using Tegra::Shader::GlobalAtomicOp;
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using Tegra::Shader::GlobalAtomicType;
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using Tegra::Shader::Instruction;
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using Tegra::Shader::OpCode;
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using Tegra::Shader::Register;
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@ -335,6 +337,24 @@ u32 ShaderIR::DecodeMemory(NodeBlock& bb, u32 pc) {
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}
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break;
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}
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case OpCode::Id::ATOM: {
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UNIMPLEMENTED_IF_MSG(instr.atom.operation != GlobalAtomicOp::Add, "operation={}",
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static_cast<int>(instr.atom.operation.Value()));
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UNIMPLEMENTED_IF_MSG(instr.atom.type != GlobalAtomicType::S32, "type={}",
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static_cast<int>(instr.atom.type.Value()));
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const auto [real_address, base_address, descriptor] =
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TrackGlobalMemory(bb, instr, true, true);
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if (!real_address || !base_address) {
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// Tracking failed, skip atomic.
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break;
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}
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Node gmem = MakeNode<GmemNode>(real_address, base_address, descriptor);
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Node value = Operation(OperationCode::AtomicAdd, std::move(gmem), GetRegister(instr.gpr20));
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SetRegister(bb, instr.gpr0, std::move(value));
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break;
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}
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case OpCode::Id::ATOMS: {
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UNIMPLEMENTED_IF_MSG(instr.atoms.operation != AtomicOp::Add, "operation={}",
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static_cast<int>(instr.atoms.operation.Value()));
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@ -348,7 +368,7 @@ u32 ShaderIR::DecodeMemory(NodeBlock& bb, u32 pc) {
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Node memory = GetSharedMemory(std::move(address));
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Node data = GetRegister(instr.gpr20);
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Node value = Operation(OperationCode::UAtomicAdd, std::move(memory), std::move(data));
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Node value = Operation(OperationCode::AtomicAdd, std::move(memory), std::move(data));
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SetRegister(bb, instr.gpr0, std::move(value));
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break;
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}
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@ -162,7 +162,7 @@ enum class OperationCode {
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AtomicImageXor, /// (MetaImage, int[N] coords) -> void
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AtomicImageExchange, /// (MetaImage, int[N] coords) -> void
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UAtomicAdd, /// (smem, uint) -> uint
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AtomicAdd, /// (memory, {u}int) -> {u}int
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Branch, /// (uint branch_target) -> void
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BranchIndirect, /// (uint branch_target) -> void
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