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Merge pull request #1402 from ReinUsesLisp/asserts
video_core: Add asserts for CS, TFB and alpha testing
This commit is contained in:
commit
cc866d1384
5 changed files with 92 additions and 3 deletions
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@ -461,7 +461,11 @@ public:
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u32 entry;
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} macros;
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INSERT_PADDING_WORDS(0x1B8);
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INSERT_PADDING_WORDS(0x189);
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u32 tfb_enabled;
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INSERT_PADDING_WORDS(0x2E);
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RenderTargetConfig rt[NumRenderTargets];
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@ -594,7 +598,9 @@ public:
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u32 depth_write_enabled;
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INSERT_PADDING_WORDS(0x7);
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u32 alpha_test_enabled;
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INSERT_PADDING_WORDS(0x6);
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u32 d3d_cull_mode;
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@ -977,6 +983,7 @@ private:
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"Field " #field_name " has invalid position")
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ASSERT_REG_POSITION(macros, 0x45);
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ASSERT_REG_POSITION(tfb_enabled, 0x1D1);
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ASSERT_REG_POSITION(rt, 0x200);
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ASSERT_REG_POSITION(viewport_transform[0], 0x280);
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ASSERT_REG_POSITION(viewport, 0x300);
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@ -996,6 +1003,7 @@ ASSERT_REG_POSITION(zeta_height, 0x48b);
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ASSERT_REG_POSITION(depth_test_enable, 0x4B3);
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ASSERT_REG_POSITION(independent_blend_enable, 0x4B9);
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ASSERT_REG_POSITION(depth_write_enabled, 0x4BA);
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ASSERT_REG_POSITION(alpha_test_enabled, 0x4BB);
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ASSERT_REG_POSITION(d3d_cull_mode, 0x4C2);
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ASSERT_REG_POSITION(depth_test_func, 0x4C3);
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ASSERT_REG_POSITION(blend, 0x4CF);
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@ -2,12 +2,29 @@
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// Licensed under GPLv2 or any later version
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// Refer to the license.txt file included.
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#include "common/logging/log.h"
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#include "core/core.h"
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#include "video_core/engines/maxwell_compute.h"
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namespace Tegra {
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namespace Engines {
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void MaxwellCompute::WriteReg(u32 method, u32 value) {}
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void MaxwellCompute::WriteReg(u32 method, u32 value) {
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ASSERT_MSG(method < Regs::NUM_REGS,
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"Invalid MaxwellCompute register, increase the size of the Regs structure");
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regs.reg_array[method] = value;
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switch (method) {
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case MAXWELL_COMPUTE_REG_INDEX(compute): {
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LOG_CRITICAL(HW_GPU, "Compute shaders are not implemented");
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UNREACHABLE();
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break;
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}
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default:
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break;
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}
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}
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} // namespace Engines
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} // namespace Tegra
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@ -4,17 +4,53 @@
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#pragma once
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#include <array>
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#include "common/assert.h"
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#include "common/bit_field.h"
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#include "common/common_funcs.h"
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#include "common/common_types.h"
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namespace Tegra::Engines {
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#define MAXWELL_COMPUTE_REG_INDEX(field_name) \
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(offsetof(Tegra::Engines::MaxwellCompute::Regs, field_name) / sizeof(u32))
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class MaxwellCompute final {
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public:
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MaxwellCompute() = default;
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~MaxwellCompute() = default;
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struct Regs {
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static constexpr std::size_t NUM_REGS = 0xCF8;
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union {
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struct {
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INSERT_PADDING_WORDS(0x281);
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union {
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u32 compute_end;
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BitField<0, 1, u32> unknown;
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} compute;
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INSERT_PADDING_WORDS(0xA76);
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};
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std::array<u32, NUM_REGS> reg_array;
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};
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} regs{};
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static_assert(sizeof(Regs) == Regs::NUM_REGS * sizeof(u32),
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"MaxwellCompute Regs has wrong size");
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/// Write the value to the register identified by method.
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void WriteReg(u32 method, u32 value);
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};
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#define ASSERT_REG_POSITION(field_name, position) \
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static_assert(offsetof(MaxwellCompute::Regs, field_name) == position * 4, \
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"Field " #field_name " has invalid position")
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ASSERT_REG_POSITION(compute, 0x281);
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#undef ASSERT_REG_POSITION
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} // namespace Tegra::Engines
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@ -450,6 +450,8 @@ void RasterizerOpenGL::DrawArrays() {
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SyncBlendState();
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SyncLogicOpState();
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SyncCullMode();
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SyncAlphaTest();
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SyncTransformFeedback();
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// TODO(bunnei): Sync framebuffer_scale uniform here
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// TODO(bunnei): Sync scissorbox uniform(s) here
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@ -883,4 +885,24 @@ void RasterizerOpenGL::SyncLogicOpState() {
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state.logic_op.operation = MaxwellToGL::LogicOp(regs.logic_op.operation);
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}
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void RasterizerOpenGL::SyncAlphaTest() {
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const auto& regs = Core::System::GetInstance().GPU().Maxwell3D().regs;
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// TODO(Rodrigo): Alpha testing is a legacy OpenGL feature, but it can be
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// implemented with a test+discard in fragment shaders.
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if (regs.alpha_test_enabled != 0) {
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LOG_CRITICAL(Render_OpenGL, "Alpha testing is not implemented");
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UNREACHABLE();
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}
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}
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void RasterizerOpenGL::SyncTransformFeedback() {
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const auto& regs = Core::System::GetInstance().GPU().Maxwell3D().regs;
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if (regs.tfb_enabled != 0) {
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LOG_CRITICAL(Render_OpenGL, "Transform feedbacks are not implemented");
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UNREACHABLE();
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}
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}
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} // namespace OpenGL
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@ -158,6 +158,12 @@ private:
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/// Syncs the LogicOp state to match the guest state
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void SyncLogicOpState();
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/// Syncs the alpha test state to match the guest state
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void SyncAlphaTest();
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/// Syncs the transform feedback state to match the guest state
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void SyncTransformFeedback();
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bool has_ARB_direct_state_access = false;
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bool has_ARB_multi_bind = false;
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bool has_ARB_separate_shader_objects = false;
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