mirror of
https://git.suyu.dev/suyu/suyu.git
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Merge pull request #629 from archshift/lcdfb
Implement SetLcdForceBlack and add implementation for color filling in the GPU code
This commit is contained in:
commit
b56829df02
12 changed files with 282 additions and 52 deletions
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@ -45,6 +45,7 @@ static std::shared_ptr<Logger> global_logger;
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SUB(Service, SOC) \
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CLS(HW) \
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SUB(HW, Memory) \
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SUB(HW, LCD) \
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SUB(HW, GPU) \
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CLS(Frontend) \
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CLS(Render) \
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@ -65,6 +65,7 @@ enum class Class : ClassType {
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Service_SOC, ///< The SOC (Socket) service
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HW, ///< Low-level hardware emulation
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HW_Memory, ///< Memory-map and address translation
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HW_LCD, ///< LCD register emulation
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HW_GPU, ///< GPU control emulation
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Frontend, ///< Emulator UI
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Render, ///< Emulator video output and hardware acceleration
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@ -87,6 +87,7 @@ set(SRCS
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hle/svc.cpp
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hw/gpu.cpp
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hw/hw.cpp
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hw/lcd.cpp
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loader/elf.cpp
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loader/loader.cpp
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loader/ncch.cpp
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@ -196,6 +197,7 @@ set(HEADERS
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hle/svc.h
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hw/gpu.h
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hw/hw.h
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hw/lcd.h
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loader/elf.h
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loader/loader.h
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loader/ncch.h
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@ -7,14 +7,20 @@
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#include "core/mem_map.h"
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#include "core/hle/kernel/event.h"
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#include "core/hle/kernel/shared_memory.h"
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#include "core/hle/result.h"
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#include "gsp_gpu.h"
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#include "core/hw/hw.h"
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#include "core/hw/gpu.h"
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#include "core/hw/lcd.h"
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#include "video_core/gpu_debugger.h"
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// Main graphics debugger object - TODO: Here is probably not the best place for this
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GraphicsDebugger g_debugger;
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// Beginning address of HW regs
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const static u32 REGS_BEGIN = 0x1EB00000;
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////////////////////////////////////////////////////////////////////////////////////////////////////
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// Namespace GSP_GPU
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@ -85,7 +91,7 @@ static void WriteHWRegs(u32 base_address, u32 size_in_bytes, const u32* data) {
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return;
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while (size_in_bytes > 0) {
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GPU::Write<u32>(base_address + 0x1EB00000, *data);
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HW::Write<u32>(base_address + REGS_BEGIN, *data);
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size_in_bytes -= 4;
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++data;
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@ -128,15 +134,15 @@ static void WriteHWRegsWithMask(u32 base_address, u32 size_in_bytes, const u32*
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return;
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while (size_in_bytes > 0) {
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const u32 reg_address = base_address + 0x1EB00000;
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const u32 reg_address = base_address + REGS_BEGIN;
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u32 reg_value;
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GPU::Read<u32>(reg_value, reg_address);
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HW::Read<u32>(reg_value, reg_address);
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// Update the current value of the register only for set mask bits
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reg_value = (reg_value & ~*masks) | (*data | *masks);
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GPU::Write<u32>(reg_address, reg_value);
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HW::Write<u32>(reg_address, reg_value);
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size_in_bytes -= 4;
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++data;
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@ -188,7 +194,7 @@ static void ReadHWRegs(Service::Interface* self) {
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u32* dst = (u32*)Memory::GetPointer(cmd_buff[0x41]);
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while (size > 0) {
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GPU::Read<u32>(*dst, reg_addr + 0x1EB00000);
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HW::Read<u32>(*dst, reg_addr + REGS_BEGIN);
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size -= 4;
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++dst;
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@ -427,6 +433,32 @@ static void ExecuteCommand(const Command& command, u32 thread_id) {
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}
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}
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/**
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* GSP_GPU::SetLcdForceBlack service function
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*
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* Enable or disable REG_LCDCOLORFILL with the color black.
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*
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* Inputs:
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* 1: Black color fill flag (0 = don't fill, !0 = fill)
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* Outputs:
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* 1: Result code
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*/
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static void SetLcdForceBlack(Service::Interface* self) {
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u32* cmd_buff = Kernel::GetCommandBuffer();
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bool enable_black = cmd_buff[1] != 0;
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LCD::Regs::ColorFill data = {0};
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// Since data is already zeroed, there is no need to explicitly set
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// the color to black (all zero).
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data.is_enabled = enable_black;
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LCD::Write(HW::VADDR_LCD + 4 * LCD_REG_INDEX(color_fill_top), data.raw); // Top LCD
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LCD::Write(HW::VADDR_LCD + 4 * LCD_REG_INDEX(color_fill_bottom), data.raw); // Bottom LCD
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cmd_buff[1] = RESULT_SUCCESS.raw;
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}
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/// This triggers handling of the GX command written to the command buffer in shared memory.
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static void TriggerCmdReqQueue(Service::Interface* self) {
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// Iterate through each thread's command queue...
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@ -460,7 +492,7 @@ const Interface::FunctionInfo FunctionTable[] = {
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{0x00080082, FlushDataCache, "FlushDataCache"},
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{0x00090082, nullptr, "InvalidateDataCache"},
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{0x000A0044, nullptr, "RegisterInterruptEvents"},
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{0x000B0040, nullptr, "SetLcdForceBlack"},
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{0x000B0040, SetLcdForceBlack, "SetLcdForceBlack"},
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{0x000C0000, TriggerCmdReqQueue, "TriggerCmdReqQueue"},
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{0x000D0140, nullptr, "SetDisplayTransfer"},
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{0x000E0180, nullptr, "SetTextureCopy"},
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@ -15,12 +15,13 @@
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#include "core/hle/service/gsp_gpu.h"
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#include "core/hle/service/dsp_dsp.h"
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#include "core/hw/hw.h"
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#include "core/hw/gpu.h"
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#include "video_core/command_processor.h"
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#include "video_core/utils.h"
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#include "video_core/video_core.h"
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#include <video_core/color.h>
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#include "video_core/color.h"
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namespace GPU {
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@ -40,7 +41,7 @@ static bool last_skip_frame = false;
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template <typename T>
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inline void Read(T &var, const u32 raw_addr) {
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u32 addr = raw_addr - 0x1EF00000;
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u32 addr = raw_addr - HW::VADDR_GPU;
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u32 index = addr / 4;
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// Reads other than u32 are untested, so I'd rather have them abort than silently fail
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@ -54,7 +55,7 @@ inline void Read(T &var, const u32 raw_addr) {
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template <typename T>
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inline void Write(u32 addr, const T data) {
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addr -= 0x1EF00000;
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addr -= HW::VADDR_GPU;
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u32 index = addr / 4;
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// Writes other than u32 are untested, so I'd rather have them abort than silently fail
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@ -313,8 +314,6 @@ void Init() {
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framebuffer_top.address_right2 = 0x182B9800;
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framebuffer_sub.address_left1 = 0x1848F000;
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framebuffer_sub.address_left2 = 0x184C7800;
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//framebuffer_sub.address_right1 = unknown;
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//framebuffer_sub.address_right2 = unknown;
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framebuffer_top.width = 240;
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framebuffer_top.height = 400;
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@ -246,6 +246,8 @@ struct Regs {
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return content[index];
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}
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#undef ASSERT_MEMBER_SIZE
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private:
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/*
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* Most physical addresses which GPU registers refer to are 8-byte aligned.
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@ -6,43 +6,19 @@
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#include "core/hw/hw.h"
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#include "core/hw/gpu.h"
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#include "core/hw/lcd.h"
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namespace HW {
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enum {
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VADDR_HASH = 0x1EC01000,
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VADDR_CSND = 0x1EC03000,
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VADDR_DSP = 0x1EC40000,
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VADDR_PDN = 0x1EC41000,
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VADDR_CODEC = 0x1EC41000,
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VADDR_SPI = 0x1EC42000,
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VADDR_SPI_2 = 0x1EC43000, // Only used under TWL_FIRM?
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VADDR_I2C = 0x1EC44000,
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VADDR_CODEC_2 = 0x1EC45000,
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VADDR_HID = 0x1EC46000,
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VADDR_PAD = 0x1EC46000,
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VADDR_PTM = 0x1EC46000,
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VADDR_GPIO = 0x1EC47000,
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VADDR_I2C_2 = 0x1EC48000,
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VADDR_SPI_3 = 0x1EC60000,
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VADDR_I2C_3 = 0x1EC61000,
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VADDR_MIC = 0x1EC62000,
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VADDR_PXI = 0x1EC63000, // 0xFFFD2000
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//VADDR_NTRCARD
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VADDR_CDMA = 0xFFFDA000, // CoreLink DMA-330? Info
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VADDR_DSP_2 = 0x1ED03000,
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VADDR_HASH_2 = 0x1EE01000,
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VADDR_GPU = 0x1EF00000,
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};
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template <typename T>
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inline void Read(T &var, const u32 addr) {
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switch (addr & 0xFFFFF000) {
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case VADDR_GPU:
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GPU::Read(var, addr);
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break;
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case VADDR_LCD:
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LCD::Write(var, addr);
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break;
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default:
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LOG_ERROR(HW_Memory, "unknown Read%lu @ 0x%08X", sizeof(var) * 8, addr);
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}
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@ -51,11 +27,12 @@ inline void Read(T &var, const u32 addr) {
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template <typename T>
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inline void Write(u32 addr, const T data) {
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switch (addr & 0xFFFFF000) {
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case VADDR_GPU:
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GPU::Write(addr, data);
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break;
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case VADDR_LCD:
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LCD::Write(addr, data);
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break;
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default:
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LOG_ERROR(HW_Memory, "unknown Write%lu 0x%08X @ 0x%08X", sizeof(data) * 8, (u32)data, addr);
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}
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@ -80,6 +57,7 @@ void Update() {
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/// Initialize hardware
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void Init() {
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GPU::Init();
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LCD::Init();
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LOG_DEBUG(HW, "initialized OK");
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}
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@ -8,6 +8,30 @@
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namespace HW {
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/// Beginnings of IO register regions, in the user VA space.
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enum : u32 {
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VADDR_HASH = 0x1EC01000,
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VADDR_CSND = 0x1EC03000,
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VADDR_DSP = 0x1EC40000,
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VADDR_PDN = 0x1EC41000,
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VADDR_CODEC = 0x1EC41000,
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VADDR_SPI = 0x1EC42000,
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VADDR_SPI_2 = 0x1EC43000, // Only used under TWL_FIRM?
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VADDR_I2C = 0x1EC44000,
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VADDR_CODEC_2 = 0x1EC45000,
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VADDR_HID = 0x1EC46000,
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VADDR_GPIO = 0x1EC47000,
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VADDR_I2C_2 = 0x1EC48000,
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VADDR_SPI_3 = 0x1EC60000,
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VADDR_I2C_3 = 0x1EC61000,
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VADDR_MIC = 0x1EC62000,
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VADDR_PXI = 0x1EC63000,
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VADDR_LCD = 0x1ED02000,
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VADDR_DSP_2 = 0x1ED03000,
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VADDR_HASH_2 = 0x1EE01000,
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VADDR_GPU = 0x1EF00000,
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};
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template <typename T>
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void Read(T &var, const u32 addr);
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66
src/core/hw/lcd.cpp
Normal file
66
src/core/hw/lcd.cpp
Normal file
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@ -0,0 +1,66 @@
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// Copyright 2015 Citra Emulator Project
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// Licensed under GPLv2 or any later version
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// Refer to the license.txt file included.
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#include "common/common_types.h"
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#include "core/arm/arm_interface.h"
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#include "core/hle/hle.h"
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#include "core/hw/hw.h"
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#include "core/hw/lcd.h"
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namespace LCD {
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Regs g_regs;
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template <typename T>
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inline void Read(T &var, const u32 raw_addr) {
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u32 addr = raw_addr - HW::VADDR_LCD;
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u32 index = addr / 4;
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// Reads other than u32 are untested, so I'd rather have them abort than silently fail
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if (index >= 0x400 || !std::is_same<T, u32>::value) {
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LOG_ERROR(HW_LCD, "unknown Read%lu @ 0x%08X", sizeof(var) * 8, addr);
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return;
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}
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var = g_regs[index];
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}
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template <typename T>
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inline void Write(u32 addr, const T data) {
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addr -= HW::VADDR_LCD;
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u32 index = addr / 4;
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// Writes other than u32 are untested, so I'd rather have them abort than silently fail
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if (index >= 0x400 || !std::is_same<T, u32>::value) {
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LOG_ERROR(HW_LCD, "unknown Write%lu 0x%08X @ 0x%08X", sizeof(data) * 8, (u32)data, addr);
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return;
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}
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g_regs[index] = static_cast<u32>(data);
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}
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// Explicitly instantiate template functions because we aren't defining this in the header:
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template void Read<u64>(u64 &var, const u32 addr);
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template void Read<u32>(u32 &var, const u32 addr);
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template void Read<u16>(u16 &var, const u32 addr);
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template void Read<u8>(u8 &var, const u32 addr);
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template void Write<u64>(u32 addr, const u64 data);
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template void Write<u32>(u32 addr, const u32 data);
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template void Write<u16>(u32 addr, const u16 data);
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template void Write<u8>(u32 addr, const u8 data);
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/// Initialize hardware
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void Init() {
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LOG_DEBUG(HW_LCD, "initialized OK");
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}
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/// Shutdown hardware
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void Shutdown() {
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LOG_DEBUG(HW_LCD, "shutdown OK");
|
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}
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|
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} // namespace
|
88
src/core/hw/lcd.h
Normal file
88
src/core/hw/lcd.h
Normal file
|
@ -0,0 +1,88 @@
|
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// Copyright 2015 Citra Emulator Project
|
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// Licensed under GPLv2 or any later version
|
||||
// Refer to the license.txt file included.
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|
||||
#pragma once
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|
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#include <cstddef>
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#include "common/common_types.h"
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#include "common/bit_field.h"
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|
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#define LCD_REG_INDEX(field_name) (offsetof(LCD::Regs, field_name) / sizeof(u32))
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namespace LCD {
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|
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struct Regs {
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union ColorFill {
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u32 raw;
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|
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BitField<0, 8, u32> color_r;
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BitField<8, 8, u32> color_g;
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BitField<16, 8, u32> color_b;
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BitField<24, 1, u32> is_enabled;
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};
|
||||
|
||||
INSERT_PADDING_WORDS(0x81);
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ColorFill color_fill_top;
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INSERT_PADDING_WORDS(0xE);
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u32 backlight_top;
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||||
|
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INSERT_PADDING_WORDS(0x1F0);
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|
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ColorFill color_fill_bottom;
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INSERT_PADDING_WORDS(0xE);
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u32 backlight_bottom;
|
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INSERT_PADDING_WORDS(0x16F);
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||||
|
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static inline size_t NumIds() {
|
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return sizeof(Regs) / sizeof(u32);
|
||||
}
|
||||
|
||||
u32& operator [] (int index) const {
|
||||
u32* content = (u32*)this;
|
||||
return content[index];
|
||||
}
|
||||
|
||||
u32& operator [] (int index) {
|
||||
u32* content = (u32*)this;
|
||||
return content[index];
|
||||
}
|
||||
|
||||
#undef ASSERT_MEMBER_SIZE
|
||||
|
||||
};
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||||
static_assert(std::is_standard_layout<Regs>::value, "Structure does not use standard layout");
|
||||
|
||||
// TODO: MSVC does not support using offsetof() on non-static data members even though this
|
||||
// is technically allowed since C++11. This macro should be enabled once MSVC adds
|
||||
// support for that.
|
||||
#ifndef _MSC_VER
|
||||
#define ASSERT_REG_POSITION(field_name, position) \
|
||||
static_assert(offsetof(Regs, field_name) == position * 4, \
|
||||
"Field "#field_name" has invalid position")
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||||
|
||||
ASSERT_REG_POSITION(color_fill_top, 0x81);
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ASSERT_REG_POSITION(backlight_top, 0x90);
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||||
ASSERT_REG_POSITION(color_fill_bottom, 0x281);
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ASSERT_REG_POSITION(backlight_bottom, 0x290);
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||||
|
||||
#undef ASSERT_REG_POSITION
|
||||
#endif // !defined(_MSC_VER)
|
||||
|
||||
extern Regs g_regs;
|
||||
|
||||
template <typename T>
|
||||
void Read(T &var, const u32 addr);
|
||||
|
||||
template <typename T>
|
||||
void Write(u32 addr, const T data);
|
||||
|
||||
/// Initialize hardware
|
||||
void Init();
|
||||
|
||||
/// Shutdown hardware
|
||||
void Shutdown();
|
||||
|
||||
} // namespace
|
|
@ -3,6 +3,8 @@
|
|||
// Refer to the license.txt file included.
|
||||
|
||||
#include "core/hw/gpu.h"
|
||||
#include "core/hw/hw.h"
|
||||
#include "core/hw/lcd.h"
|
||||
#include "core/mem_map.h"
|
||||
|
||||
#include "common/emu_window.h"
|
||||
|
@ -64,6 +66,19 @@ void RendererOpenGL::SwapBuffers() {
|
|||
for(int i : {0, 1}) {
|
||||
const auto& framebuffer = GPU::g_regs.framebuffer_config[i];
|
||||
|
||||
// Main LCD (0): 0x1ED02204, Sub LCD (1): 0x1ED02A04
|
||||
u32 lcd_color_addr = (i == 0) ? LCD_REG_INDEX(color_fill_top) : LCD_REG_INDEX(color_fill_bottom);
|
||||
lcd_color_addr = HW::VADDR_LCD + 4 * lcd_color_addr;
|
||||
LCD::Regs::ColorFill color_fill = {0};
|
||||
LCD::Read(color_fill.raw, lcd_color_addr);
|
||||
|
||||
if (color_fill.is_enabled) {
|
||||
LoadColorToActiveGLTexture(color_fill.color_r, color_fill.color_g, color_fill.color_b, textures[i]);
|
||||
|
||||
// Resize the texture in case the framebuffer size has changed
|
||||
textures[i].width = 1;
|
||||
textures[i].height = 1;
|
||||
} else {
|
||||
if (textures[i].width != (GLsizei)framebuffer.width ||
|
||||
textures[i].height != (GLsizei)framebuffer.height ||
|
||||
textures[i].format != framebuffer.color_format) {
|
||||
|
@ -72,8 +87,12 @@ void RendererOpenGL::SwapBuffers() {
|
|||
// performance problem.
|
||||
ConfigureFramebufferTexture(textures[i], framebuffer);
|
||||
}
|
||||
LoadFBToActiveGLTexture(framebuffer, textures[i]);
|
||||
|
||||
LoadFBToActiveGLTexture(GPU::g_regs.framebuffer_config[i], textures[i]);
|
||||
// Resize the texture in case the framebuffer size has changed
|
||||
textures[i].width = framebuffer.width;
|
||||
textures[i].height = framebuffer.height;
|
||||
}
|
||||
}
|
||||
|
||||
DrawScreens();
|
||||
|
@ -130,7 +149,22 @@ void RendererOpenGL::LoadFBToActiveGLTexture(const GPU::Regs::FramebufferConfig&
|
|||
texture.gl_format, texture.gl_type, framebuffer_data);
|
||||
|
||||
glPixelStorei(GL_UNPACK_ROW_LENGTH, 0);
|
||||
glBindTexture(GL_TEXTURE_2D, 0);
|
||||
}
|
||||
|
||||
/**
|
||||
* Fills active OpenGL texture with the given RGB color.
|
||||
* Since the color is solid, the texture can be 1x1 but will stretch across whatever it's rendered on.
|
||||
* This has the added benefit of being *really fast*.
|
||||
*/
|
||||
void RendererOpenGL::LoadColorToActiveGLTexture(u8 color_r, u8 color_g, u8 color_b,
|
||||
const TextureInfo& texture) {
|
||||
glBindTexture(GL_TEXTURE_2D, texture.handle);
|
||||
|
||||
u8 framebuffer_data[3] = { color_r, color_g, color_b };
|
||||
|
||||
// Update existing texture
|
||||
glTexImage2D(GL_TEXTURE_2D, 0, GL_RGB, 1, 1, 0, GL_RGB, GL_UNSIGNED_BYTE, framebuffer_data);
|
||||
glBindTexture(GL_TEXTURE_2D, 0);
|
||||
}
|
||||
|
||||
|
|
|
@ -58,6 +58,9 @@ private:
|
|||
// Loads framebuffer from emulated memory into the active OpenGL texture.
|
||||
static void LoadFBToActiveGLTexture(const GPU::Regs::FramebufferConfig& framebuffer,
|
||||
const TextureInfo& texture);
|
||||
// Fills active OpenGL texture with the given RGB color.
|
||||
static void LoadColorToActiveGLTexture(u8 color_r, u8 color_g, u8 color_b,
|
||||
const TextureInfo& texture);
|
||||
|
||||
/// Computes the viewport rectangle
|
||||
MathUtil::Rectangle<unsigned> GetViewportExtent();
|
||||
|
@ -72,7 +75,7 @@ private:
|
|||
GLuint vertex_array_handle;
|
||||
GLuint vertex_buffer_handle;
|
||||
GLuint program_id;
|
||||
std::array<TextureInfo, 2> textures;
|
||||
std::array<TextureInfo, 2> textures; ///< Textures for top and bottom screens respectively
|
||||
// Shader uniform location indices
|
||||
GLuint uniform_modelview_matrix;
|
||||
GLuint uniform_color_texture;
|
||||
|
|
Loading…
Reference in a new issue