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GPU: Partially implemented the shader BRA instruction.
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2 changed files with 43 additions and 1 deletions
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@ -288,6 +288,19 @@ union Instruction {
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}
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} texs;
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union {
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BitField<20, 5, u64> target;
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BitField<5, 1, u64> constant_buffer;
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s32 GetBranchTarget() const {
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// Sign extend the branch target offset
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u32 mask = 1U << (5 - 1);
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u32 value = static_cast<u32>(target);
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// The branch offset is relative to the next instruction, so add 1 to it.
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return static_cast<s32>((value ^ mask) - mask) + 1;
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}
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} bra;
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BitField<61, 1, u64> is_b_imm;
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BitField<60, 1, u64> is_b_gpr;
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BitField<59, 1, u64> is_c_gpr;
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@ -88,6 +88,20 @@ private:
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return *subroutines.insert(std::move(subroutine)).first;
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}
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/// Merges exit method of two parallel branches.
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static ExitMethod ParallelExit(ExitMethod a, ExitMethod b) {
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if (a == ExitMethod::Undetermined) {
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return b;
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}
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if (b == ExitMethod::Undetermined) {
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return a;
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}
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if (a == b) {
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return a;
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}
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return ExitMethod::Conditional;
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}
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/// Scans a range of code for labels and determines the exit method.
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ExitMethod Scan(u32 begin, u32 end, std::set<u32>& labels) {
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auto [iter, inserted] =
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@ -97,11 +111,19 @@ private:
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return exit_method;
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for (u32 offset = begin; offset != end && offset != PROGRAM_END; ++offset) {
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if (const auto opcode = OpCode::Decode({program_code[offset]})) {
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const Instruction instr = {program_code[offset]};
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if (const auto opcode = OpCode::Decode(instr)) {
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switch (opcode->GetId()) {
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case OpCode::Id::EXIT: {
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return exit_method = ExitMethod::AlwaysEnd;
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}
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case OpCode::Id::BRA: {
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u32 target = offset + instr.bra.GetBranchTarget();
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labels.insert(target);
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ExitMethod no_jmp = Scan(offset + 1, end, labels);
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ExitMethod jmp = Scan(target, end, labels);
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return exit_method = ParallelExit(no_jmp, jmp);
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}
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}
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}
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}
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@ -1081,6 +1103,13 @@ private:
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shader.AddLine("discard;");
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break;
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}
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case OpCode::Id::BRA: {
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ASSERT_MSG(instr.bra.constant_buffer == 0,
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"BRA with constant buffers are not implemented");
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u32 target = offset + instr.bra.GetBranchTarget();
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shader.AddLine("{ jmp_to = " + std::to_string(target) + "u; break; }");
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break;
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}
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case OpCode::Id::IPA: {
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const auto& attribute = instr.attribute.fmt28;
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regs.SetRegisterToInputAttibute(instr.gpr0, attribute.element, attribute.index);
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