mirror of
https://git.suyu.dev/suyu/suyu.git
synced 2024-11-24 20:36:24 -05:00
shader_ir: Add predicate combiner helper
This commit is contained in:
parent
bf07272695
commit
a58abbcfc4
2 changed files with 15 additions and 0 deletions
|
@ -309,6 +309,18 @@ Node ShaderIR::GetPredicateComparisonHalf(Tegra::Shader::PredCondition condition
|
|||
return predicate;
|
||||
}
|
||||
|
||||
OperationCode ShaderIR::GetPredicateCombiner(PredOperation operation) {
|
||||
static const std::unordered_map<PredOperation, OperationCode> PredicateOperationTable = {
|
||||
{PredOperation::And, OperationCode::LogicalAnd},
|
||||
{PredOperation::Or, OperationCode::LogicalOr},
|
||||
{PredOperation::Xor, OperationCode::LogicalXor},
|
||||
};
|
||||
|
||||
const auto op = PredicateOperationTable.find(operation);
|
||||
UNIMPLEMENTED_IF_MSG(op == PredicateOperationTable.end(), "Unknown predicate operation");
|
||||
return op->second;
|
||||
}
|
||||
|
||||
void ShaderIR::SetRegister(BasicBlock& bb, Register dest, Node src) {
|
||||
bb.push_back(Operation(OperationCode::Assign, GetRegister(dest), src));
|
||||
}
|
||||
|
|
|
@ -669,6 +669,9 @@ private:
|
|||
Node GetPredicateComparisonHalf(Tegra::Shader::PredCondition condition,
|
||||
const MetaHalfArithmetic& meta, Node op_a, Node op_b);
|
||||
|
||||
/// Returns a predicate combiner operation
|
||||
OperationCode GetPredicateCombiner(Tegra::Shader::PredOperation operation);
|
||||
|
||||
template <typename... T>
|
||||
inline Node Operation(OperationCode code, const T*... operands) {
|
||||
return StoreNode(OperationNode(code, operands...));
|
||||
|
|
Loading…
Reference in a new issue