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Implement Bindless Handling on SetupTexture
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parent
fe392fff24
commit
7af82ca022
4 changed files with 34 additions and 18 deletions
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@ -482,19 +482,8 @@ std::vector<Texture::FullTextureInfo> Maxwell3D::GetStageTextures(Regs::ShaderSt
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return textures;
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}
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Texture::FullTextureInfo Maxwell3D::GetStageTexture(Regs::ShaderStage stage,
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Texture::FullTextureInfo Maxwell3D::GetTextureInfo(const Texture::TextureHandle tex_handle,
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std::size_t offset) const {
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auto& shader = state.shader_stages[static_cast<std::size_t>(stage)];
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auto& tex_info_buffer = shader.const_buffers[regs.tex_cb_index];
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ASSERT(tex_info_buffer.enabled && tex_info_buffer.address != 0);
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const GPUVAddr tex_info_address =
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tex_info_buffer.address + offset * sizeof(Texture::TextureHandle);
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ASSERT(tex_info_address < tex_info_buffer.address + tex_info_buffer.size);
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const Texture::TextureHandle tex_handle{memory_manager.Read<u32>(tex_info_address)};
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Texture::FullTextureInfo tex_info{};
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tex_info.index = static_cast<u32>(offset);
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@ -511,6 +500,22 @@ Texture::FullTextureInfo Maxwell3D::GetStageTexture(Regs::ShaderStage stage,
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return tex_info;
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}
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Texture::FullTextureInfo Maxwell3D::GetStageTexture(Regs::ShaderStage stage,
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std::size_t offset) const {
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auto& shader = state.shader_stages[static_cast<std::size_t>(stage)];
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auto& tex_info_buffer = shader.const_buffers[regs.tex_cb_index];
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ASSERT(tex_info_buffer.enabled && tex_info_buffer.address != 0);
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const GPUVAddr tex_info_address =
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tex_info_buffer.address + offset * sizeof(Texture::TextureHandle);
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ASSERT(tex_info_address < tex_info_buffer.address + tex_info_buffer.size);
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const Texture::TextureHandle tex_handle{memory_manager.Read<u32>(tex_info_address)};
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return GetTextureInfo(tex_handle, offset);
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}
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u32 Maxwell3D::GetRegisterValue(u32 method) const {
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ASSERT_MSG(method < Regs::NUM_REGS, "Invalid Maxwell3D register");
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return regs.reg_array[method];
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@ -1131,6 +1131,10 @@ public:
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/// Write the value to the register identified by method.
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void CallMethod(const GPU::MethodCall& method_call);
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/// Given a Texture Handle, returns the TSC and TIC entries.
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Texture::FullTextureInfo GetTextureInfo(const Texture::TextureHandle tex_handle,
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std::size_t offset) const;
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/// Returns a list of enabled textures for the specified shader stage.
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std::vector<Texture::FullTextureInfo> GetStageTextures(Regs::ShaderStage stage) const;
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@ -985,7 +985,15 @@ void RasterizerOpenGL::SetupTextures(Maxwell::ShaderStage stage, const Shader& s
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for (u32 bindpoint = 0; bindpoint < entries.size(); ++bindpoint) {
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const auto& entry = entries[bindpoint];
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const auto texture = maxwell3d.GetStageTexture(stage, entry.GetOffset());
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Tegra::Texture::FullTextureInfo texture;
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if (!entry.IsBindless()) {
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texture = maxwell3d.GetStageTexture(stage, entry.GetOffset());
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} else {
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const auto cbuf = entry.GetBindlessCBuf();
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Tegra::Texture::TextureHandle tex_handle;
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tex_handle.raw = const_buffer_accessor.access32(stage, cbuf.first, cbuf.second);
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texture = maxwell3d.GetTextureInfo(tex_handle, entry.GetOffset());
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}
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const u32 current_bindpoint = base_bindings.sampler + bindpoint;
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texture_samplers[current_bindpoint].SyncWithConfig(texture.tsc);
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@ -205,8 +205,8 @@ public:
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// Use this constructor for bindless Samplers
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explicit Sampler(u32 cbuf_index, u32 cbuf_offset, std::size_t index,
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Tegra::Shader::TextureType type, bool is_array, bool is_shadow)
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: offset{(static_cast<u64>(cbuf_index) << 32) | cbuf_offset}, index{index}, type{type}, is_array{is_array},
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is_shadow{is_shadow}, is_bindless{true} {}
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: offset{(static_cast<u64>(cbuf_index) << 32) | cbuf_offset}, index{index}, type{type},
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is_array{is_array}, is_shadow{is_shadow}, is_bindless{true} {}
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// Use this only for serialization/deserialization
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explicit Sampler(std::size_t offset, std::size_t index, Tegra::Shader::TextureType type,
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@ -214,7 +214,6 @@ public:
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: offset{offset}, index{index}, type{type}, is_array{is_array}, is_shadow{is_shadow},
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is_bindless{is_bindless} {}
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std::size_t GetOffset() const {
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return offset;
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}
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@ -239,7 +238,7 @@ public:
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return is_bindless;
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}
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std::pair<u32, u32> GetBindlessCBuf() {
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std::pair<u32, u32> GetBindlessCBuf() const {
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return {offset >> 32, offset & 0x00000000FFFFFFFFULL};
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}
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