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Merge pull request #654 from bunnei/cond-exit
gl_shader_decompiler: Use FlowCondition field in EXIT instruction.
This commit is contained in:
commit
52636f67cc
2 changed files with 34 additions and 8 deletions
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@ -201,6 +201,11 @@ enum class IMinMaxExchange : u64 {
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XHi = 3,
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XHi = 3,
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};
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};
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enum class FlowCondition : u64 {
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Always = 0xF,
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Fcsm_Tr = 0x1C, // TODO(bunnei): What is this used for?
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};
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union Instruction {
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union Instruction {
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Instruction& operator=(const Instruction& instr) {
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Instruction& operator=(const Instruction& instr) {
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value = instr.value;
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value = instr.value;
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@ -315,6 +320,10 @@ union Instruction {
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}
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}
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} bfe;
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} bfe;
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union {
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BitField<0, 5, FlowCondition> cond;
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} flow;
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union {
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union {
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BitField<48, 1, u64> negate_b;
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BitField<48, 1, u64> negate_b;
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BitField<49, 1, u64> negate_c;
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BitField<49, 1, u64> negate_c;
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@ -1639,16 +1639,32 @@ private:
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shader.AddLine("color.a = " + regs.GetRegisterAsFloat(3) + ';');
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shader.AddLine("color.a = " + regs.GetRegisterAsFloat(3) + ';');
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}
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}
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shader.AddLine("return true;");
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switch (instr.flow.cond) {
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if (instr.pred.pred_index == static_cast<u64>(Pred::UnusedIndex)) {
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case Tegra::Shader::FlowCondition::Always:
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// If this is an unconditional exit then just end processing here, otherwise
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shader.AddLine("return true;");
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// we have to account for the possibility of the condition not being met, so
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if (instr.pred.pred_index == static_cast<u64>(Pred::UnusedIndex)) {
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// continue processing the next instruction.
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// If this is an unconditional exit then just end processing here,
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offset = PROGRAM_END - 1;
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// otherwise we have to account for the possibility of the condition
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// not being met, so continue processing the next instruction.
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offset = PROGRAM_END - 1;
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}
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break;
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case Tegra::Shader::FlowCondition::Fcsm_Tr:
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// TODO(bunnei): What is this used for? If we assume this conditon is not
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// satisifed, dual vertex shaders in Farming Simulator make more sense
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LOG_CRITICAL(HW_GPU, "Skipping unknown FlowCondition::Fcsm_Tr");
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break;
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default:
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LOG_CRITICAL(HW_GPU, "Unhandled flow condition: {}",
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static_cast<u32>(instr.flow.cond.Value()));
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UNREACHABLE();
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}
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}
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break;
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break;
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}
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}
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case OpCode::Id::KIL: {
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case OpCode::Id::KIL: {
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ASSERT(instr.flow.cond == Tegra::Shader::FlowCondition::Always);
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shader.AddLine("discard;");
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shader.AddLine("discard;");
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break;
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break;
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}
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}
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@ -1669,8 +1685,9 @@ private:
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// can ignore this when generating GLSL code.
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// can ignore this when generating GLSL code.
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break;
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break;
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}
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}
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case OpCode::Id::DEPBAR:
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case OpCode::Id::SYNC:
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case OpCode::Id::SYNC: {
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ASSERT(instr.flow.cond == Tegra::Shader::FlowCondition::Always);
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case OpCode::Id::DEPBAR: {
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// TODO(Subv): Find out if we actually have to care about these instructions or if
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// TODO(Subv): Find out if we actually have to care about these instructions or if
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// the GLSL compiler takes care of that for us.
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// the GLSL compiler takes care of that for us.
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LOG_WARNING(HW_GPU, "DEPBAR/SYNC instruction is stubbed");
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LOG_WARNING(HW_GPU, "DEPBAR/SYNC instruction is stubbed");
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