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arm: Remove ARM26 support.
This will never be used. 32-bit is the norm.
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parent
c51b23b052
commit
49a22acd02
2 changed files with 4 additions and 45 deletions
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@ -82,14 +82,6 @@ ARMul_State* ARMul_NewState(ARMul_State* state)
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state->Inted = 3;
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state->LastInted = 3;
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#ifdef ARM61
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state->prog32Sig = LOW;
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state->data32Sig = LOW;
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#else
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state->prog32Sig = HIGH;
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state->data32Sig = HIGH;
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#endif
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state->lateabtSig = HIGH;
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state->bigendSig = LOW;
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@ -102,14 +94,6 @@ ARMul_State* ARMul_NewState(ARMul_State* state)
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void ARMul_SelectProcessor(ARMul_State* state, unsigned properties)
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{
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if (properties & ARM_Fix26_Prop) {
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state->prog32Sig = LOW;
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state->data32Sig = LOW;
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} else {
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state->prog32Sig = HIGH;
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state->data32Sig = HIGH;
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}
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state->is_v4 = (properties & (ARM_v4_Prop | ARM_v5_Prop)) != 0;
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state->is_v5 = (properties & ARM_v5_Prop) != 0;
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state->is_v5e = (properties & ARM_v5e_Prop) != 0;
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@ -132,15 +116,10 @@ void ARMul_SelectProcessor(ARMul_State* state, unsigned properties)
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void ARMul_Reset(ARMul_State* state)
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{
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state->NextInstr = 0;
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if (state->prog32Sig) {
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state->Reg[15] = 0;
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state->Cpsr = INTBITS | SVC32MODE;
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state->Mode = SVC32MODE;
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} else {
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state->Reg[15] = R15INTBITS | SVC26MODE;
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state->Cpsr = INTBITS | SVC26MODE;
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state->Mode = SVC26MODE;
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}
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state->Reg[15] = 0;
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state->Cpsr = INTBITS | SVC32MODE;
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state->Mode = SVC32MODE;
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state->Bank = SVCBANK;
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FLUSHPIPE;
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@ -149,8 +149,6 @@ struct ARMul_State
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unsigned abortSig;
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unsigned NtransSig;
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unsigned bigendSig;
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unsigned prog32Sig;
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unsigned data32Sig;
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unsigned syscallSig;
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/* 2004-05-09 chy
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@ -227,7 +225,6 @@ typedef ARMul_State arm_core_t;
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\***************************************************************************/
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enum {
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ARM_Fix26_Prop = 0x01,
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ARM_Nexec_Prop = 0x02,
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ARM_Debug_Prop = 0x10,
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ARM_Isync_Prop = ARM_Debug_Prop,
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@ -242,19 +239,6 @@ enum {
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ARM_iWMMXt_Prop = 0x800,
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ARM_PXA27X_Prop = 0x1000,
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ARM_v7_Prop = 0x2000,
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// ARM2 family
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ARM2 = ARM_Fix26_Prop,
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ARM2as = ARM2,
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ARM61 = ARM2,
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ARM3 = ARM2,
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// ARM6 family
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ARM6 = ARM_Lock_Prop,
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ARM60 = ARM6,
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ARM600 = ARM6,
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ARM610 = ARM6,
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ARM620 = ARM6
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};
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/***************************************************************************\
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@ -287,10 +271,6 @@ enum {
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\***************************************************************************/
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enum {
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USER26MODE = 0,
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FIQ26MODE = 1,
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IRQ26MODE = 2,
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SVC26MODE = 3,
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USER32MODE = 16,
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FIQ32MODE = 17,
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IRQ32MODE = 18,
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