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https://git.suyu.dev/suyu/suyu.git
synced 2024-11-22 19:00:14 -05:00
Support multiple videos playing
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parent
8a613f6c8f
commit
2c47f8aa18
6 changed files with 36 additions and 41 deletions
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@ -21,7 +21,7 @@ NvResult nvhost_nvdec::Ioctl1(DeviceFD fd, Ioctl command, const std::vector<u8>&
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case 0x0:
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case 0x0:
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switch (command.cmd) {
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switch (command.cmd) {
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case 0x1:
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case 0x1:
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return Submit(input, output);
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return Submit(fd, input, output);
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case 0x2:
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case 0x2:
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return GetSyncpoint(input, output);
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return GetSyncpoint(input, output);
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case 0x3:
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case 0x3:
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@ -62,11 +62,16 @@ NvResult nvhost_nvdec::Ioctl3(DeviceFD fd, Ioctl command, const std::vector<u8>&
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return NvResult::NotImplemented;
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return NvResult::NotImplemented;
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}
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}
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void nvhost_nvdec::OnOpen(DeviceFD fd) {}
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void nvhost_nvdec::OnOpen(DeviceFD fd) {
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static u32 next_id{};
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fd_to_id[fd] = next_id++;
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}
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void nvhost_nvdec::OnClose(DeviceFD fd) {
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void nvhost_nvdec::OnClose(DeviceFD fd) {
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LOG_INFO(Service_NVDRV, "NVDEC video stream ended");
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LOG_INFO(Service_NVDRV, "NVDEC video stream ended");
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system.GPU().ClearCdmaInstance();
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if (fd_to_id.find(fd) != fd_to_id.end()) {
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system.GPU().ClearCdmaInstance(fd_to_id[fd]);
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}
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}
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}
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} // namespace Service::Nvidia::Devices
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} // namespace Service::Nvidia::Devices
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@ -59,7 +59,8 @@ NvResult nvhost_nvdec_common::SetNVMAPfd(const std::vector<u8>& input) {
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return NvResult::Success;
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return NvResult::Success;
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}
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}
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NvResult nvhost_nvdec_common::Submit(const std::vector<u8>& input, std::vector<u8>& output) {
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NvResult nvhost_nvdec_common::Submit(DeviceFD fd, const std::vector<u8>& input,
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std::vector<u8>& output) {
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IoctlSubmit params{};
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IoctlSubmit params{};
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std::memcpy(¶ms, input.data(), sizeof(IoctlSubmit));
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std::memcpy(¶ms, input.data(), sizeof(IoctlSubmit));
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LOG_DEBUG(Service_NVDRV, "called NVDEC Submit, cmd_buffer_count={}", params.cmd_buffer_count);
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LOG_DEBUG(Service_NVDRV, "called NVDEC Submit, cmd_buffer_count={}", params.cmd_buffer_count);
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@ -93,7 +94,7 @@ NvResult nvhost_nvdec_common::Submit(const std::vector<u8>& input, std::vector<u
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Tegra::ChCommandHeaderList cmdlist(cmd_buffer.word_count);
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Tegra::ChCommandHeaderList cmdlist(cmd_buffer.word_count);
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system.Memory().ReadBlock(object->addr + cmd_buffer.offset, cmdlist.data(),
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system.Memory().ReadBlock(object->addr + cmd_buffer.offset, cmdlist.data(),
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cmdlist.size() * sizeof(u32));
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cmdlist.size() * sizeof(u32));
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gpu.PushCommandBuffer(cmdlist);
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gpu.PushCommandBuffer(fd_to_id[fd], cmdlist);
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}
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}
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std::memcpy(output.data(), ¶ms, sizeof(IoctlSubmit));
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std::memcpy(output.data(), ¶ms, sizeof(IoctlSubmit));
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// Some games expect command_buffers to be written back
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// Some games expect command_buffers to be written back
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@ -104,13 +104,14 @@ protected:
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/// Ioctl command implementations
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/// Ioctl command implementations
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NvResult SetNVMAPfd(const std::vector<u8>& input);
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NvResult SetNVMAPfd(const std::vector<u8>& input);
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NvResult Submit(const std::vector<u8>& input, std::vector<u8>& output);
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NvResult Submit(DeviceFD fd, const std::vector<u8>& input, std::vector<u8>& output);
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NvResult GetSyncpoint(const std::vector<u8>& input, std::vector<u8>& output);
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NvResult GetSyncpoint(const std::vector<u8>& input, std::vector<u8>& output);
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NvResult GetWaitbase(const std::vector<u8>& input, std::vector<u8>& output);
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NvResult GetWaitbase(const std::vector<u8>& input, std::vector<u8>& output);
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NvResult MapBuffer(const std::vector<u8>& input, std::vector<u8>& output);
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NvResult MapBuffer(const std::vector<u8>& input, std::vector<u8>& output);
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NvResult UnmapBuffer(const std::vector<u8>& input, std::vector<u8>& output);
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NvResult UnmapBuffer(const std::vector<u8>& input, std::vector<u8>& output);
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NvResult SetSubmitTimeout(const std::vector<u8>& input, std::vector<u8>& output);
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NvResult SetSubmitTimeout(const std::vector<u8>& input, std::vector<u8>& output);
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std::unordered_map<DeviceFD, u32> fd_to_id{};
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s32_le nvmap_fd{};
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s32_le nvmap_fd{};
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u32_le submit_timeout{};
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u32_le submit_timeout{};
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std::shared_ptr<nvmap> nvmap_dev;
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std::shared_ptr<nvmap> nvmap_dev;
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@ -21,7 +21,7 @@ NvResult nvhost_vic::Ioctl1(DeviceFD fd, Ioctl command, const std::vector<u8>& i
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case 0x0:
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case 0x0:
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switch (command.cmd) {
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switch (command.cmd) {
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case 0x1:
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case 0x1:
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return Submit(input, output);
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return Submit(fd, input, output);
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case 0x2:
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case 0x2:
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return GetSyncpoint(input, output);
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return GetSyncpoint(input, output);
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case 0x3:
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case 0x3:
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@ -62,10 +62,15 @@ NvResult nvhost_vic::Ioctl3(DeviceFD fd, Ioctl command, const std::vector<u8>& i
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return NvResult::NotImplemented;
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return NvResult::NotImplemented;
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}
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}
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void nvhost_vic::OnOpen(DeviceFD fd) {}
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void nvhost_vic::OnOpen(DeviceFD fd) {
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static u32 next_id{};
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fd_to_id[fd] = next_id++;
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}
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void nvhost_vic::OnClose(DeviceFD fd) {
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void nvhost_vic::OnClose(DeviceFD fd) {
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system.GPU().ClearCdmaInstance();
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if (fd_to_id.find(fd) != fd_to_id.end()) {
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system.GPU().ClearCdmaInstance(fd_to_id[fd]);
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}
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}
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}
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} // namespace Service::Nvidia::Devices
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} // namespace Service::Nvidia::Devices
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@ -185,16 +185,6 @@ struct GPU::Impl {
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return *dma_pusher;
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return *dma_pusher;
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}
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}
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/// Returns a reference to the GPU CDMA pusher.
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[[nodiscard]] Tegra::CDmaPusher& CDmaPusher() {
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return *cdma_pusher;
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}
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/// Returns a const reference to the GPU CDMA pusher.
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[[nodiscard]] const Tegra::CDmaPusher& CDmaPusher() const {
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return *cdma_pusher;
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}
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/// Returns a reference to the underlying renderer.
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/// Returns a reference to the underlying renderer.
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[[nodiscard]] VideoCore::RendererBase& Renderer() {
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[[nodiscard]] VideoCore::RendererBase& Renderer() {
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return *renderer;
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return *renderer;
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@ -338,25 +328,26 @@ struct GPU::Impl {
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}
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}
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/// Push GPU command buffer entries to be processed
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/// Push GPU command buffer entries to be processed
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void PushCommandBuffer(Tegra::ChCommandHeaderList& entries) {
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void PushCommandBuffer(u32 id, Tegra::ChCommandHeaderList& entries) {
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if (!use_nvdec) {
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if (!use_nvdec) {
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return;
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return;
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}
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}
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if (!cdma_pusher) {
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if (cdma_pushers.find(id) == cdma_pushers.end()) {
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cdma_pusher = std::make_unique<Tegra::CDmaPusher>(gpu);
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cdma_pushers[id] = std::make_unique<Tegra::CDmaPusher>(gpu);
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}
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}
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// SubmitCommandBuffer would make the nvdec operations async, this is not currently working
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// SubmitCommandBuffer would make the nvdec operations async, this is not currently working
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// TODO(ameerj): RE proper async nvdec operation
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// TODO(ameerj): RE proper async nvdec operation
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// gpu_thread.SubmitCommandBuffer(std::move(entries));
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// gpu_thread.SubmitCommandBuffer(std::move(entries));
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cdma_pushers[id]->ProcessEntries(std::move(entries));
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cdma_pusher->ProcessEntries(std::move(entries));
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}
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}
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/// Frees the CDMAPusher instance to free up resources
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/// Frees the CDMAPusher instance to free up resources
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void ClearCdmaInstance() {
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void ClearCdmaInstance(u32 id) {
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cdma_pusher.reset();
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if (cdma_pushers.find(id) != cdma_pushers.end()) {
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cdma_pushers.erase(id);
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}
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}
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}
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/// Swap buffers (render frame)
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/// Swap buffers (render frame)
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@ -659,7 +650,7 @@ struct GPU::Impl {
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Core::System& system;
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Core::System& system;
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std::unique_ptr<Tegra::MemoryManager> memory_manager;
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std::unique_ptr<Tegra::MemoryManager> memory_manager;
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std::unique_ptr<Tegra::DmaPusher> dma_pusher;
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std::unique_ptr<Tegra::DmaPusher> dma_pusher;
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std::unique_ptr<Tegra::CDmaPusher> cdma_pusher;
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std::map<u32, std::unique_ptr<Tegra::CDmaPusher>> cdma_pushers;
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std::unique_ptr<VideoCore::RendererBase> renderer;
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std::unique_ptr<VideoCore::RendererBase> renderer;
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VideoCore::RasterizerInterface* rasterizer = nullptr;
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VideoCore::RasterizerInterface* rasterizer = nullptr;
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const bool use_nvdec;
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const bool use_nvdec;
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@ -811,14 +802,6 @@ const Tegra::DmaPusher& GPU::DmaPusher() const {
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return impl->DmaPusher();
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return impl->DmaPusher();
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}
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}
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Tegra::CDmaPusher& GPU::CDmaPusher() {
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return impl->CDmaPusher();
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}
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const Tegra::CDmaPusher& GPU::CDmaPusher() const {
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return impl->CDmaPusher();
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}
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VideoCore::RendererBase& GPU::Renderer() {
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VideoCore::RendererBase& GPU::Renderer() {
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return impl->Renderer();
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return impl->Renderer();
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}
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}
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@ -887,12 +870,12 @@ void GPU::PushGPUEntries(Tegra::CommandList&& entries) {
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impl->PushGPUEntries(std::move(entries));
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impl->PushGPUEntries(std::move(entries));
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}
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}
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void GPU::PushCommandBuffer(Tegra::ChCommandHeaderList& entries) {
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void GPU::PushCommandBuffer(u32 id, Tegra::ChCommandHeaderList& entries) {
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impl->PushCommandBuffer(entries);
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impl->PushCommandBuffer(id, entries);
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}
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}
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void GPU::ClearCdmaInstance() {
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void GPU::ClearCdmaInstance(u32 id) {
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impl->ClearCdmaInstance();
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impl->ClearCdmaInstance(id);
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}
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}
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void GPU::SwapBuffers(const Tegra::FramebufferConfig* framebuffer) {
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void GPU::SwapBuffers(const Tegra::FramebufferConfig* framebuffer) {
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@ -242,10 +242,10 @@ public:
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void PushGPUEntries(Tegra::CommandList&& entries);
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void PushGPUEntries(Tegra::CommandList&& entries);
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/// Push GPU command buffer entries to be processed
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/// Push GPU command buffer entries to be processed
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void PushCommandBuffer(Tegra::ChCommandHeaderList& entries);
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void PushCommandBuffer(u32 id, Tegra::ChCommandHeaderList& entries);
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/// Frees the CDMAPusher instance to free up resources
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/// Frees the CDMAPusher instance to free up resources
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void ClearCdmaInstance();
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void ClearCdmaInstance(u32 id);
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/// Swap buffers (render frame)
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/// Swap buffers (render frame)
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void SwapBuffers(const Tegra::FramebufferConfig* framebuffer);
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void SwapBuffers(const Tegra::FramebufferConfig* framebuffer);
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