2021-05-20 23:38:38 -04:00
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// Copyright 2021 yuzu Emulator Project
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// Licensed under GPLv2 or any later version
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// Refer to the license.txt file included.
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#include <string_view>
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#include "shader_recompiler/backend/glsl/emit_context.h"
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2021-05-29 02:09:29 -04:00
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#include "shader_recompiler/backend/glsl/emit_glsl_instructions.h"
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#include "shader_recompiler/frontend/ir/value.h"
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namespace Shader::Backend::GLSL {
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void EmitLoadStorageU8([[maybe_unused]] EmitContext& ctx, IR::Inst& inst,
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[[maybe_unused]] const IR::Value& binding,
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[[maybe_unused]] const IR::Value& offset) {
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const auto offset_var{ctx.reg_alloc.Consume(offset)};
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ctx.AddU32("{}=bitfieldExtract(ssbo{}[{}/4],int({}%4)*8,8);", inst, binding.U32(), offset_var,
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offset_var);
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}
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void EmitLoadStorageS8([[maybe_unused]] EmitContext& ctx, IR::Inst& inst,
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[[maybe_unused]] const IR::Value& binding,
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[[maybe_unused]] const IR::Value& offset) {
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const auto offset_var{ctx.reg_alloc.Consume(offset)};
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ctx.AddS32("{}=bitfieldExtract(int(ssbo{}[{}/4]),int({}%4)*8,8);", inst, binding.U32(),
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offset_var, offset_var);
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}
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void EmitLoadStorageU16([[maybe_unused]] EmitContext& ctx, IR::Inst& inst,
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[[maybe_unused]] const IR::Value& binding,
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[[maybe_unused]] const IR::Value& offset) {
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const auto offset_var{ctx.reg_alloc.Consume(offset)};
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ctx.AddU32("{}=bitfieldExtract(ssbo{}[{}/4],int(({}/2)%2)*16,16);", inst, binding.U32(),
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offset_var, offset_var);
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}
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void EmitLoadStorageS16([[maybe_unused]] EmitContext& ctx, IR::Inst& inst,
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[[maybe_unused]] const IR::Value& binding,
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[[maybe_unused]] const IR::Value& offset) {
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const auto offset_var{ctx.reg_alloc.Consume(offset)};
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ctx.AddS32("{}=bitfieldExtract(int(ssbo{}[{}/4]),int(({}/2)%2)*16,16);", inst, binding.U32(),
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offset_var, offset_var);
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}
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2021-05-24 18:35:37 -04:00
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void EmitLoadStorage32(EmitContext& ctx, IR::Inst& inst, const IR::Value& binding,
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const IR::Value& offset) {
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const auto offset_var{ctx.reg_alloc.Consume(offset)};
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ctx.AddU32("{}=ssbo{}[{}/4];", inst, binding.U32(), offset_var);
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}
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2021-05-25 01:35:30 -04:00
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void EmitLoadStorage64(EmitContext& ctx, IR::Inst& inst, const IR::Value& binding,
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const IR::Value& offset) {
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const auto offset_var{ctx.reg_alloc.Consume(offset)};
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ctx.AddU32x2("{}=uvec2(ssbo{}[{}/4],ssbo{}[{}/4+1]);", inst, binding.U32(), offset_var,
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binding.U32(), offset_var);
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}
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void EmitLoadStorage128(EmitContext& ctx, IR::Inst& inst, const IR::Value& binding,
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const IR::Value& offset) {
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const auto offset_var{ctx.reg_alloc.Consume(offset)};
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ctx.AddU32x4("{}=uvec4(ssbo{}[{}/4],ssbo{}[{}/4+1],ssbo{}[{}/4+2],ssbo{}[{}/4+3]);", inst,
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binding.U32(), offset_var, binding.U32(), offset_var, binding.U32(), offset_var,
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binding.U32(), offset_var);
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}
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void EmitWriteStorageU8([[maybe_unused]] EmitContext& ctx,
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[[maybe_unused]] const IR::Value& binding,
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[[maybe_unused]] const IR::Value& offset,
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[[maybe_unused]] std::string_view value) {
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const auto offset_var{ctx.reg_alloc.Consume(offset)};
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ctx.Add("ssbo{}[{}/4]=bitfieldInsert(ssbo{}[{}/4],{},int({}%4)*8,8);", binding.U32(),
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offset_var, binding.U32(), offset_var, value, offset_var);
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}
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void EmitWriteStorageS8([[maybe_unused]] EmitContext& ctx,
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[[maybe_unused]] const IR::Value& binding,
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[[maybe_unused]] const IR::Value& offset,
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[[maybe_unused]] std::string_view value) {
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const auto offset_var{ctx.reg_alloc.Consume(offset)};
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ctx.Add("ssbo{}[{}/4]=bitfieldInsert(ssbo{}[{}/4],{},int({}%4)*8,8);", binding.U32(),
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offset_var, binding.U32(), offset_var, value, offset_var);
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}
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void EmitWriteStorageU16([[maybe_unused]] EmitContext& ctx,
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[[maybe_unused]] const IR::Value& binding,
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[[maybe_unused]] const IR::Value& offset,
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[[maybe_unused]] std::string_view value) {
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const auto offset_var{ctx.reg_alloc.Consume(offset)};
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ctx.Add("ssbo{}[{}/4]=bitfieldInsert(ssbo{}[{}/4],{},int(({}/2)%2)*16,16);", binding.U32(),
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offset_var, binding.U32(), offset_var, value, offset_var);
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}
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void EmitWriteStorageS16([[maybe_unused]] EmitContext& ctx,
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[[maybe_unused]] const IR::Value& binding,
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[[maybe_unused]] const IR::Value& offset,
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[[maybe_unused]] std::string_view value) {
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const auto offset_var{ctx.reg_alloc.Consume(offset)};
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ctx.Add("ssbo{}[{}/4]=bitfieldInsert(ssbo{}[{}/4],{},int(({}/2)%2)*16,16);", binding.U32(),
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offset_var, binding.U32(), offset_var, value, offset_var);
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}
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2021-05-22 01:52:03 -04:00
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void EmitWriteStorage32(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset,
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std::string_view value) {
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const auto offset_var{ctx.reg_alloc.Consume(offset)};
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ctx.Add("ssbo{}[{}/4]={};", binding.U32(), offset_var, value);
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}
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2021-05-22 01:52:03 -04:00
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void EmitWriteStorage64(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset,
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std::string_view value) {
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const auto offset_var{ctx.reg_alloc.Consume(offset)};
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ctx.Add("ssbo{}[{}/4]={}.x;", binding.U32(), offset_var, value);
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ctx.Add("ssbo{}[({}/4)+1]={}.y;", binding.U32(), offset_var, value);
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}
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void EmitWriteStorage128([[maybe_unused]] EmitContext& ctx,
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[[maybe_unused]] const IR::Value& binding,
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[[maybe_unused]] const IR::Value& offset,
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[[maybe_unused]] std::string_view value) {
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const auto offset_var{ctx.reg_alloc.Consume(offset)};
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ctx.Add("ssbo{}[{}/4]={}.x;", binding.U32(), offset_var, value);
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ctx.Add("ssbo{}[({}/4)+1]={}.y;", binding.U32(), offset_var, value);
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ctx.Add("ssbo{}[({}/4)+2]={}.z;", binding.U32(), offset_var, value);
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ctx.Add("ssbo{}[({}/4)+3]={}.w;", binding.U32(), offset_var, value);
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}
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} // namespace Shader::Backend::GLSL
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