Merge Saturating Narrow and not Arrow, boolean to flags
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ca89fbb6c4
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aa8b5acca6
3 changed files with 102 additions and 140 deletions
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@ -1054,32 +1054,32 @@ namespace ChocolArm64.Instruction
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public static void Sqadd_S(AILEmitterCtx Context)
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{
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EmitScalarSaturatingOpSxSx(Context, () => Context.Emit(OpCodes.Add));
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EmitScalarBinarySaturatingOpSxSx(Context, () => Context.Emit(OpCodes.Add));
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}
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public static void Sqadd_V(AILEmitterCtx Context)
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{
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EmitVectorSaturatingOpSxSx(Context, () => Context.Emit(OpCodes.Add));
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EmitVectorBinarySaturatingOpSxSx(Context, () => Context.Emit(OpCodes.Add));
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}
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public static void Sqxtn_S(AILEmitterCtx Context)
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{
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EmitScalarSaturatingNarrowOpSxSx(Context, () => { });
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EmitScalarUnarySaturatingNarrowOpSxSx(Context, () => { });
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}
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public static void Sqxtn_V(AILEmitterCtx Context)
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{
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EmitVectorSaturatingNarrowOpSxSx(Context, () => { });
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EmitVectorUnarySaturatingNarrowOpSxSx(Context, () => { });
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}
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public static void Sqxtun_S(AILEmitterCtx Context)
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{
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EmitScalarSaturatingNarrowOpSxZx(Context, () => { });
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EmitScalarUnarySaturatingNarrowOpSxZx(Context, () => { });
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}
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public static void Sqxtun_V(AILEmitterCtx Context)
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{
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EmitVectorSaturatingNarrowOpSxZx(Context, () => { });
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EmitVectorUnarySaturatingNarrowOpSxZx(Context, () => { });
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}
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public static void Ssubw_V(AILEmitterCtx Context)
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@ -1233,22 +1233,22 @@ namespace ChocolArm64.Instruction
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public static void Uqadd_S(AILEmitterCtx Context)
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{
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EmitScalarSaturatingOpZxZx(Context, () => Context.Emit(OpCodes.Add));
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EmitScalarBinarySaturatingOpZxZx(Context, () => Context.Emit(OpCodes.Add));
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}
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public static void Uqadd_V(AILEmitterCtx Context)
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{
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EmitVectorSaturatingOpZxZx(Context, () => Context.Emit(OpCodes.Add));
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EmitVectorBinarySaturatingOpZxZx(Context, () => Context.Emit(OpCodes.Add));
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}
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public static void Uqxtn_S(AILEmitterCtx Context)
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{
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EmitScalarSaturatingNarrowOpZxZx(Context, () => { });
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EmitScalarUnarySaturatingNarrowOpZxZx(Context, () => { });
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}
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public static void Uqxtn_V(AILEmitterCtx Context)
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{
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EmitVectorSaturatingNarrowOpZxZx(Context, () => { });
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EmitVectorUnarySaturatingNarrowOpZxZx(Context, () => { });
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}
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public static void Usubw_V(AILEmitterCtx Context)
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@ -781,168 +781,126 @@ namespace ChocolArm64.Instruction
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}
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}
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public static void EmitScalarSaturatingOpSxSx(AILEmitterCtx Context, Action Emit)
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[Flags]
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public enum SaturatingFlags
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{
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EmitSaturatingOp(Context, Emit, true, true, true);
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None = 0,
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SignedSrc = 1 << 0,
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SignedDst = 1 << 1,
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Scalar = 1 << 2,
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Narrow = 1 << 3,
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Binary = 1 << 4,
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SxSxScalar = SignedSrc | SignedDst | Scalar,
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SxSxScalarNarrow = SignedSrc | SignedDst | Scalar | Narrow,
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SxZxScalar = SignedSrc | Scalar,
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SxZxScalarNarrow = SignedSrc | Scalar | Narrow,
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ZxZxScalar = Scalar,
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ZxZxScalarNarrow = Scalar | Narrow,
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SxSxVector = SignedSrc | SignedDst,
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SxSxVectorNarrow = SignedSrc | SignedDst | Narrow,
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SxZxVector = SignedSrc,
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SxZxVectorNarrow = SignedSrc | Narrow,
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ZxZxVector = 0,
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ZxZxVectorNarrow = Narrow,
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SxSxScalarBinary = SignedSrc | SignedDst | Scalar | Binary,
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SxSxScalarNarrowBinary = SignedSrc | SignedDst | Scalar | Narrow | Binary,
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SxZxScalarBinary = SignedSrc | Scalar | Binary,
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SxZxScalarNarrowBinary = SignedSrc | Scalar | Narrow | Binary,
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ZxZxScalarBinary = Scalar | Binary,
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ZxZxScalarNarrowBinary = Scalar | Narrow | Binary,
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SxSxVectorBinary = SignedSrc | SignedDst | Binary,
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SxSxVectorNarrowBinary = SignedSrc | SignedDst | Narrow | Binary,
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SxZxVectorBinary = SignedSrc | Binary,
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SxZxVectorNarrowBinary = SignedSrc | Narrow | Binary,
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ZxZxVectorBinary = Binary,
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ZxZxVectorNarrowBinary = Narrow | Binary
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}
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public static void EmitScalarSaturatingOpSxZx(AILEmitterCtx Context, Action Emit)
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public static void EmitScalarBinarySaturatingOpSxSx(AILEmitterCtx Context, Action Emit)
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{
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EmitSaturatingOp(Context, Emit, true, false, true);
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EmitSaturatingOp(Context, Emit, SaturatingFlags.SxSxScalarBinary);
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}
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public static void EmitScalarSaturatingOpZxZx(AILEmitterCtx Context, Action Emit)
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public static void EmitScalarBinarySaturatingOpZxZx(AILEmitterCtx Context, Action Emit)
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{
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EmitSaturatingOp(Context, Emit, false, false, true);
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EmitSaturatingOp(Context, Emit, SaturatingFlags.ZxZxScalarBinary);
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}
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public static void EmitVectorSaturatingOpSxSx(AILEmitterCtx Context, Action Emit)
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public static void EmitVectorBinarySaturatingOpSxSx(AILEmitterCtx Context, Action Emit)
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{
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EmitSaturatingOp(Context, Emit, true, true, false);
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EmitSaturatingOp(Context, Emit, SaturatingFlags.SxSxVectorBinary);
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}
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public static void EmitVectorSaturatingOpSxZx(AILEmitterCtx Context, Action Emit)
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public static void EmitVectorBinarySaturatingOpZxZx(AILEmitterCtx Context, Action Emit)
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{
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EmitSaturatingOp(Context, Emit, true, false, false);
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EmitSaturatingOp(Context, Emit, SaturatingFlags.ZxZxVectorBinary);
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}
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public static void EmitVectorSaturatingOpZxZx(AILEmitterCtx Context, Action Emit)
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public static void EmitScalarUnarySaturatingNarrowOpSxSx(AILEmitterCtx Context, Action Emit)
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{
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EmitSaturatingOp(Context, Emit, false, false, false);
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EmitSaturatingOp(Context, Emit, SaturatingFlags.SxSxScalarNarrow);
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}
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public static void EmitScalarUnarySaturatingNarrowOpSxZx(AILEmitterCtx Context, Action Emit)
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{
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EmitSaturatingOp(Context, Emit, SaturatingFlags.SxZxScalarNarrow);
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}
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public static void EmitScalarUnarySaturatingNarrowOpZxZx(AILEmitterCtx Context, Action Emit)
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{
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EmitSaturatingOp(Context, Emit, SaturatingFlags.ZxZxScalarNarrow);
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}
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public static void EmitVectorUnarySaturatingNarrowOpSxSx(AILEmitterCtx Context, Action Emit)
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{
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EmitSaturatingOp(Context, Emit, SaturatingFlags.SxSxVectorNarrow);
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}
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public static void EmitVectorUnarySaturatingNarrowOpSxZx(AILEmitterCtx Context, Action Emit)
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{
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EmitSaturatingOp(Context, Emit, SaturatingFlags.SxZxVectorNarrow);
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}
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public static void EmitVectorUnarySaturatingNarrowOpZxZx(AILEmitterCtx Context, Action Emit)
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{
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EmitSaturatingOp(Context, Emit, SaturatingFlags.ZxZxVectorNarrow);
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}
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public static void EmitSaturatingOp(
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AILEmitterCtx Context,
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Action Emit,
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bool SignedSrc,
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bool SignedDst,
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bool Scalar)
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SaturatingFlags Flags)
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{
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AOpCodeSimdReg Op = (AOpCodeSimdReg)Context.CurrOp;
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bool SignedSrc = (Flags & SaturatingFlags.SignedSrc) != 0;
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bool SignedDst = (Flags & SaturatingFlags.SignedDst) != 0;
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bool Scalar = (Flags & SaturatingFlags.Scalar) != 0;
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bool Narrow = (Flags & SaturatingFlags.Narrow) != 0;
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bool Binary = (Flags & SaturatingFlags.Binary) != 0;
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int Bytes = Op.GetBitsCount() >> 3;
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int Elems = !Scalar ? Bytes >> Op.Size : 1;
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int ESize = 8 << Op.Size;
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long TMaxValue = SignedDst ? (1 << (ESize - 1)) - 1 : (long)(~0UL >> (64 - ESize));
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long TMinValue = SignedDst ? -((1 << (ESize - 1))) : 0;
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Context.EmitLdc_I8(0L);
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Context.EmitSttmp();
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for (int Index = 0; Index < Elems; Index++)
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{
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AILLabel LblLe = new AILLabel();
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AILLabel LblGeEnd = new AILLabel();
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EmitVectorExtract(Context, Op.Rn, Index, Op.Size, SignedSrc);
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EmitVectorExtract(Context, Op.Rm, Index, Op.Size, SignedSrc);
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Emit();
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Context.Emit(OpCodes.Dup);
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Context.EmitLdc_I8(TMaxValue);
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Context.Emit(SignedSrc ? OpCodes.Ble_S : OpCodes.Ble_Un_S, LblLe);
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Context.Emit(OpCodes.Pop);
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Context.EmitLdc_I8(TMaxValue);
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Context.EmitLdc_I8(0x8000000L);
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Context.EmitSttmp();
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Context.Emit(OpCodes.Br_S, LblGeEnd);
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Context.MarkLabel(LblLe);
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Context.Emit(OpCodes.Dup);
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Context.EmitLdc_I8(TMinValue);
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Context.Emit(SignedSrc ? OpCodes.Bge_S : OpCodes.Bge_Un_S, LblGeEnd);
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Context.Emit(OpCodes.Pop);
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Context.EmitLdc_I8(TMinValue);
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Context.EmitLdc_I8(0x8000000L);
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Context.EmitSttmp();
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Context.MarkLabel(LblGeEnd);
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if ((Op.RegisterSize == ARegisterSize.SIMD64) || Scalar)
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{
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EmitVectorZeroUpper(Context, Op.Rd);
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}
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EmitVectorInsertTmp(Context, Index, Op.Size);
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}
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Context.EmitLdvectmp();
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Context.EmitStvec(Op.Rd);
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Context.EmitLdarg(ATranslatedSub.StateArgIdx);
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Context.EmitLdarg(ATranslatedSub.StateArgIdx);
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Context.EmitCallPropGet(typeof(AThreadState), nameof(AThreadState.Fpsr));
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Context.EmitLdtmp();
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Context.Emit(OpCodes.Conv_I4);
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Context.Emit(OpCodes.Or);
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Context.EmitCallPropSet(typeof(AThreadState), nameof(AThreadState.Fpsr));
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}
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public static void EmitScalarSaturatingNarrowOpSxSx(AILEmitterCtx Context, Action Emit)
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{
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EmitSaturatingNarrowOp(Context, Emit, true, true, true);
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}
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public static void EmitScalarSaturatingNarrowOpSxZx(AILEmitterCtx Context, Action Emit)
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{
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EmitSaturatingNarrowOp(Context, Emit, true, false, true);
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}
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public static void EmitScalarSaturatingNarrowOpZxZx(AILEmitterCtx Context, Action Emit)
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{
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EmitSaturatingNarrowOp(Context, Emit, false, false, true);
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}
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public static void EmitVectorSaturatingNarrowOpSxSx(AILEmitterCtx Context, Action Emit)
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{
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EmitSaturatingNarrowOp(Context, Emit, true, true, false);
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}
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public static void EmitVectorSaturatingNarrowOpSxZx(AILEmitterCtx Context, Action Emit)
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{
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EmitSaturatingNarrowOp(Context, Emit, true, false, false);
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}
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public static void EmitVectorSaturatingNarrowOpZxZx(AILEmitterCtx Context, Action Emit)
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{
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EmitSaturatingNarrowOp(Context, Emit, false, false, false);
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}
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public static void EmitSaturatingNarrowOp(
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AILEmitterCtx Context,
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Action Emit,
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bool SignedSrc,
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bool SignedDst,
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bool Scalar)
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{
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AOpCodeSimd Op = (AOpCodeSimd)Context.CurrOp;
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int Elems = !Scalar ? 8 >> Op.Size : 1;
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int ESize = 8 << Op.Size;
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int Part = !Scalar && (Op.RegisterSize == ARegisterSize.SIMD128) ? Elems : 0;
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int Part = 0;
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if (Narrow)
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{
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Part = !Scalar && (Op.RegisterSize == ARegisterSize.SIMD128) ? Elems : 0;
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}
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long TMaxValue = SignedDst ? (1 << (ESize - 1)) - 1 : (long)(~0UL >> (64 - ESize));
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long TMaxValue = SignedDst ? (1 << (ESize - 1)) - 1 : (1L << ESize) - 1L;
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long TMinValue = SignedDst ? -((1 << (ESize - 1))) : 0;
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Context.EmitLdc_I8(0L);
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Context.EmitSttmp();
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if (Part != 0)
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if (Part != 0 && Narrow)
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{
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Context.EmitLdvec(Op.Rd);
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Context.EmitStvectmp();
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@ -954,6 +912,10 @@ namespace ChocolArm64.Instruction
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AILLabel LblGeEnd = new AILLabel();
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EmitVectorExtract(Context, Op.Rn, Index, Op.Size + 1, SignedSrc);
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if (Binary)
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{
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EmitVectorExtract(Context, ((AOpCodeSimdReg)Op).Rm, Index, Op.Size + 1, SignedSrc);
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}
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Emit();
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@ -992,13 +954,13 @@ namespace ChocolArm64.Instruction
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EmitVectorZeroLowerTmp(Context);
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}
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EmitVectorInsertTmp(Context, Part + Index, Op.Size);
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EmitVectorInsertTmp(Context, Narrow ? Index + Part : Index, Op.Size);
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}
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Context.EmitLdvectmp();
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Context.EmitStvec(Op.Rd);
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if (Part == 0)
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if ((Op.RegisterSize == ARegisterSize.SIMD64) || Scalar || (Part == 0 && Narrow))
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{
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EmitVectorZeroUpper(Context, Op.Rd);
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}
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@ -100,7 +100,7 @@ namespace ChocolArm64.Instruction
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Context.Emit(OpCodes.Shr);
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};
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EmitVectorSaturatingNarrowOpSxSx(Context, Emit);
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EmitVectorUnarySaturatingNarrowOpSxSx(Context, Emit);
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}
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public static void Srshr_V(AILEmitterCtx Context)
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