2018-02-23 07:29:20 -05:00
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using ChocolArm64;
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2018-02-15 19:04:38 -05:00
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using ChocolArm64.Memory;
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using ChocolArm64.State;
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2018-06-18 13:55:26 -04:00
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2018-02-15 19:04:38 -05:00
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using NUnit.Framework;
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2018-06-18 13:55:26 -04:00
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2018-09-01 10:24:05 -04:00
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using Ryujinx.Tests.Unicorn;
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2018-05-11 19:10:27 -04:00
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using System;
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2018-08-15 14:59:51 -04:00
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using System.Runtime.InteropServices;
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2018-05-11 19:10:27 -04:00
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using System.Runtime.Intrinsics;
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using System.Runtime.Intrinsics.X86;
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2018-06-10 20:46:42 -04:00
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using System.Threading;
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2018-02-15 19:04:38 -05:00
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namespace Ryujinx.Tests.Cpu
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{
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[TestFixture]
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public class CpuTest
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{
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protected long Position { get; private set; }
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private long Size;
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private long EntryPoint;
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private IntPtr RamPointer;
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2018-10-30 21:43:02 -04:00
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private MemoryManager Memory;
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private CpuThread Thread;
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private static bool UnicornAvailable;
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private UnicornAArch64 UnicornEmu;
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static CpuTest()
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{
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UnicornAvailable = UnicornAArch64.IsAvailable();
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if (!UnicornAvailable)
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{
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Console.WriteLine("WARNING: Could not find Unicorn.");
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}
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}
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[SetUp]
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public void Setup()
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{
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Position = 0x1000;
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Size = 0x1000;
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EntryPoint = Position;
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2018-10-30 21:43:02 -04:00
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Translator Translator = new Translator();
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RamPointer = Marshal.AllocHGlobal(new IntPtr(Size));
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Memory = new MemoryManager(RamPointer);
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Memory.Map(Position, 0, Size);
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Thread = new CpuThread(Translator, Memory, EntryPoint);
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if (UnicornAvailable)
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{
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UnicornEmu = new UnicornAArch64();
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UnicornEmu.MemoryMap((ulong)Position, (ulong)Size, MemoryPermission.READ | MemoryPermission.EXEC);
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UnicornEmu.PC = (ulong)EntryPoint;
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}
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}
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[TearDown]
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public void Teardown()
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{
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Marshal.FreeHGlobal(RamPointer);
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Memory = null;
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Thread = null;
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UnicornEmu = null;
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}
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protected void Reset()
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{
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Teardown();
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Setup();
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}
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protected void Opcode(uint Opcode)
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{
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Thread.Memory.WriteUInt32(Position, Opcode);
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if (UnicornAvailable)
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{
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UnicornEmu.MemoryWrite32((ulong)Position, Opcode);
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}
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Position += 4;
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}
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2018-04-18 16:22:45 -04:00
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protected void SetThreadState(ulong X0 = 0, ulong X1 = 0, ulong X2 = 0, ulong X3 = 0, ulong X31 = 0,
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Vector128<float> V0 = default(Vector128<float>),
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Vector128<float> V1 = default(Vector128<float>),
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Vector128<float> V2 = default(Vector128<float>),
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Vector128<float> V3 = default(Vector128<float>),
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bool Overflow = false, bool Carry = false, bool Zero = false, bool Negative = false,
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int Fpcr = 0x0, int Fpsr = 0x0)
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{
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Thread.ThreadState.X0 = X0;
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Thread.ThreadState.X1 = X1;
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Thread.ThreadState.X2 = X2;
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Thread.ThreadState.X3 = X3;
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Thread.ThreadState.X31 = X31;
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Thread.ThreadState.V0 = V0;
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Thread.ThreadState.V1 = V1;
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Thread.ThreadState.V2 = V2;
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Thread.ThreadState.V3 = V3;
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Thread.ThreadState.Overflow = Overflow;
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Thread.ThreadState.Carry = Carry;
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Thread.ThreadState.Zero = Zero;
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Thread.ThreadState.Negative = Negative;
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Thread.ThreadState.Fpcr = Fpcr;
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Thread.ThreadState.Fpsr = Fpsr;
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if (UnicornAvailable)
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{
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UnicornEmu.X[0] = X0;
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UnicornEmu.X[1] = X1;
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UnicornEmu.X[2] = X2;
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UnicornEmu.X[3] = X3;
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UnicornEmu.SP = X31;
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UnicornEmu.Q[0] = V0;
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UnicornEmu.Q[1] = V1;
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UnicornEmu.Q[2] = V2;
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UnicornEmu.Q[3] = V3;
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UnicornEmu.OverflowFlag = Overflow;
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UnicornEmu.CarryFlag = Carry;
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UnicornEmu.ZeroFlag = Zero;
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UnicornEmu.NegativeFlag = Negative;
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UnicornEmu.Fpcr = Fpcr;
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UnicornEmu.Fpsr = Fpsr;
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}
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}
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protected void ExecuteOpcodes()
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{
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using (ManualResetEvent Wait = new ManualResetEvent(false))
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{
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Thread.ThreadState.Break += (sender, e) => Thread.StopExecution();
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Thread.WorkFinished += (sender, e) => Wait.Set();
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Thread.Execute();
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Wait.WaitOne();
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}
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if (UnicornAvailable)
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{
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UnicornEmu.RunForCount((ulong)(Position - EntryPoint - 8) / 4);
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}
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}
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2018-10-30 21:43:02 -04:00
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protected CpuThreadState GetThreadState() => Thread.ThreadState;
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protected CpuThreadState SingleOpcode(uint Opcode,
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ulong X0 = 0, ulong X1 = 0, ulong X2 = 0, ulong X3 = 0, ulong X31 = 0,
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Vector128<float> V0 = default(Vector128<float>),
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Vector128<float> V1 = default(Vector128<float>),
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Vector128<float> V2 = default(Vector128<float>),
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Vector128<float> V3 = default(Vector128<float>),
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bool Overflow = false, bool Carry = false, bool Zero = false, bool Negative = false,
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int Fpcr = 0x0, int Fpsr = 0x0)
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{
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this.Opcode(Opcode);
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this.Opcode(0xD4200000); // BRK #0
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this.Opcode(0xD65F03C0); // RET
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SetThreadState(X0, X1, X2, X3, X31, V0, V1, V2, V3, Overflow, Carry, Zero, Negative, Fpcr, Fpsr);
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ExecuteOpcodes();
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return GetThreadState();
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}
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2018-10-23 10:12:45 -04:00
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/// <summary>Rounding Mode control field.</summary>
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public enum RMode
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{
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/// <summary>Round to Nearest (RN) mode.</summary>
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RN,
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/// <summary>Round towards Plus Infinity (RP) mode.</summary>
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RP,
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/// <summary>Round towards Minus Infinity (RM) mode.</summary>
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RM,
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/// <summary>Round towards Zero (RZ) mode.</summary>
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RZ
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};
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2018-10-05 21:45:59 -04:00
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/// <summary>Floating-point Control Register.</summary>
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protected enum FPCR
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{
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/// <summary>Rounding Mode control field.</summary>
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RMode = 22,
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/// <summary>Flush-to-zero mode control bit.</summary>
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FZ = 24,
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/// <summary>Default NaN mode control bit.</summary>
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DN = 25,
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/// <summary>Alternative half-precision control bit.</summary>
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AHP = 26
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}
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/// <summary>Floating-point Status Register.</summary>
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[Flags] protected enum FPSR
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{
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None = 0,
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/// <summary>Invalid Operation cumulative floating-point exception bit.</summary>
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IOC = 1 << 0,
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/// <summary>Divide by Zero cumulative floating-point exception bit.</summary>
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DZC = 1 << 1,
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/// <summary>Overflow cumulative floating-point exception bit.</summary>
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OFC = 1 << 2,
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/// <summary>Underflow cumulative floating-point exception bit.</summary>
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UFC = 1 << 3,
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/// <summary>Inexact cumulative floating-point exception bit.</summary>
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IXC = 1 << 4,
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/// <summary>Input Denormal cumulative floating-point exception bit.</summary>
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IDC = 1 << 7,
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/// <summary>Cumulative saturation bit.</summary>
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QC = 1 << 27
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}
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2018-10-05 21:45:59 -04:00
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[Flags] protected enum FpSkips
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{
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None = 0,
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IfNaN_S = 1,
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IfNaN_D = 2,
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IfUnderflow = 4,
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IfOverflow = 8
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}
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protected enum FpTolerances
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{
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None,
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UpToOneUlps_S,
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UpToOneUlps_D
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}
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protected void CompareAgainstUnicorn(
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FPSR FpsrMask = FPSR.None,
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FpSkips FpSkips = FpSkips.None,
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FpTolerances FpTolerances = FpTolerances.None)
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{
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if (!UnicornAvailable)
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{
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return;
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}
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2018-10-05 21:45:59 -04:00
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if (FpSkips != FpSkips.None)
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{
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ManageFpSkips(FpSkips);
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2018-09-17 00:54:05 -04:00
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}
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2018-09-08 13:23:07 -04:00
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Assert.That(Thread.ThreadState.X0, Is.EqualTo(UnicornEmu.X[0]));
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Assert.That(Thread.ThreadState.X1, Is.EqualTo(UnicornEmu.X[1]));
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Assert.That(Thread.ThreadState.X2, Is.EqualTo(UnicornEmu.X[2]));
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Assert.That(Thread.ThreadState.X3, Is.EqualTo(UnicornEmu.X[3]));
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Assert.That(Thread.ThreadState.X4, Is.EqualTo(UnicornEmu.X[4]));
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Assert.That(Thread.ThreadState.X5, Is.EqualTo(UnicornEmu.X[5]));
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Assert.That(Thread.ThreadState.X6, Is.EqualTo(UnicornEmu.X[6]));
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Assert.That(Thread.ThreadState.X7, Is.EqualTo(UnicornEmu.X[7]));
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Assert.That(Thread.ThreadState.X8, Is.EqualTo(UnicornEmu.X[8]));
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Assert.That(Thread.ThreadState.X9, Is.EqualTo(UnicornEmu.X[9]));
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2018-09-01 10:24:05 -04:00
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Assert.That(Thread.ThreadState.X10, Is.EqualTo(UnicornEmu.X[10]));
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Assert.That(Thread.ThreadState.X11, Is.EqualTo(UnicornEmu.X[11]));
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Assert.That(Thread.ThreadState.X12, Is.EqualTo(UnicornEmu.X[12]));
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Assert.That(Thread.ThreadState.X13, Is.EqualTo(UnicornEmu.X[13]));
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Assert.That(Thread.ThreadState.X14, Is.EqualTo(UnicornEmu.X[14]));
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Assert.That(Thread.ThreadState.X15, Is.EqualTo(UnicornEmu.X[15]));
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Assert.That(Thread.ThreadState.X16, Is.EqualTo(UnicornEmu.X[16]));
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Assert.That(Thread.ThreadState.X17, Is.EqualTo(UnicornEmu.X[17]));
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Assert.That(Thread.ThreadState.X18, Is.EqualTo(UnicornEmu.X[18]));
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Assert.That(Thread.ThreadState.X19, Is.EqualTo(UnicornEmu.X[19]));
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Assert.That(Thread.ThreadState.X20, Is.EqualTo(UnicornEmu.X[20]));
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Assert.That(Thread.ThreadState.X21, Is.EqualTo(UnicornEmu.X[21]));
|
|
|
|
Assert.That(Thread.ThreadState.X22, Is.EqualTo(UnicornEmu.X[22]));
|
|
|
|
Assert.That(Thread.ThreadState.X23, Is.EqualTo(UnicornEmu.X[23]));
|
|
|
|
Assert.That(Thread.ThreadState.X24, Is.EqualTo(UnicornEmu.X[24]));
|
|
|
|
Assert.That(Thread.ThreadState.X25, Is.EqualTo(UnicornEmu.X[25]));
|
|
|
|
Assert.That(Thread.ThreadState.X26, Is.EqualTo(UnicornEmu.X[26]));
|
|
|
|
Assert.That(Thread.ThreadState.X27, Is.EqualTo(UnicornEmu.X[27]));
|
|
|
|
Assert.That(Thread.ThreadState.X28, Is.EqualTo(UnicornEmu.X[28]));
|
|
|
|
Assert.That(Thread.ThreadState.X29, Is.EqualTo(UnicornEmu.X[29]));
|
|
|
|
Assert.That(Thread.ThreadState.X30, Is.EqualTo(UnicornEmu.X[30]));
|
2018-09-08 13:23:07 -04:00
|
|
|
|
2018-09-01 10:24:05 -04:00
|
|
|
Assert.That(Thread.ThreadState.X31, Is.EqualTo(UnicornEmu.SP));
|
2018-09-08 13:23:07 -04:00
|
|
|
|
2018-10-05 21:45:59 -04:00
|
|
|
if (FpTolerances == FpTolerances.None)
|
2018-09-17 00:54:05 -04:00
|
|
|
{
|
|
|
|
Assert.That(Thread.ThreadState.V0, Is.EqualTo(UnicornEmu.Q[0]));
|
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
2018-10-05 21:45:59 -04:00
|
|
|
ManageFpTolerances(FpTolerances);
|
2018-09-17 00:54:05 -04:00
|
|
|
}
|
2018-09-08 13:23:07 -04:00
|
|
|
Assert.That(Thread.ThreadState.V1, Is.EqualTo(UnicornEmu.Q[1]));
|
|
|
|
Assert.That(Thread.ThreadState.V2, Is.EqualTo(UnicornEmu.Q[2]));
|
|
|
|
Assert.That(Thread.ThreadState.V3, Is.EqualTo(UnicornEmu.Q[3]));
|
|
|
|
Assert.That(Thread.ThreadState.V4, Is.EqualTo(UnicornEmu.Q[4]));
|
|
|
|
Assert.That(Thread.ThreadState.V5, Is.EqualTo(UnicornEmu.Q[5]));
|
|
|
|
Assert.That(Thread.ThreadState.V6, Is.EqualTo(UnicornEmu.Q[6]));
|
|
|
|
Assert.That(Thread.ThreadState.V7, Is.EqualTo(UnicornEmu.Q[7]));
|
|
|
|
Assert.That(Thread.ThreadState.V8, Is.EqualTo(UnicornEmu.Q[8]));
|
|
|
|
Assert.That(Thread.ThreadState.V9, Is.EqualTo(UnicornEmu.Q[9]));
|
2018-09-01 10:24:05 -04:00
|
|
|
Assert.That(Thread.ThreadState.V10, Is.EqualTo(UnicornEmu.Q[10]));
|
|
|
|
Assert.That(Thread.ThreadState.V11, Is.EqualTo(UnicornEmu.Q[11]));
|
|
|
|
Assert.That(Thread.ThreadState.V12, Is.EqualTo(UnicornEmu.Q[12]));
|
|
|
|
Assert.That(Thread.ThreadState.V13, Is.EqualTo(UnicornEmu.Q[13]));
|
|
|
|
Assert.That(Thread.ThreadState.V14, Is.EqualTo(UnicornEmu.Q[14]));
|
|
|
|
Assert.That(Thread.ThreadState.V15, Is.EqualTo(UnicornEmu.Q[15]));
|
|
|
|
Assert.That(Thread.ThreadState.V16, Is.EqualTo(UnicornEmu.Q[16]));
|
|
|
|
Assert.That(Thread.ThreadState.V17, Is.EqualTo(UnicornEmu.Q[17]));
|
|
|
|
Assert.That(Thread.ThreadState.V18, Is.EqualTo(UnicornEmu.Q[18]));
|
|
|
|
Assert.That(Thread.ThreadState.V19, Is.EqualTo(UnicornEmu.Q[19]));
|
|
|
|
Assert.That(Thread.ThreadState.V20, Is.EqualTo(UnicornEmu.Q[20]));
|
|
|
|
Assert.That(Thread.ThreadState.V21, Is.EqualTo(UnicornEmu.Q[21]));
|
|
|
|
Assert.That(Thread.ThreadState.V22, Is.EqualTo(UnicornEmu.Q[22]));
|
|
|
|
Assert.That(Thread.ThreadState.V23, Is.EqualTo(UnicornEmu.Q[23]));
|
|
|
|
Assert.That(Thread.ThreadState.V24, Is.EqualTo(UnicornEmu.Q[24]));
|
|
|
|
Assert.That(Thread.ThreadState.V25, Is.EqualTo(UnicornEmu.Q[25]));
|
|
|
|
Assert.That(Thread.ThreadState.V26, Is.EqualTo(UnicornEmu.Q[26]));
|
|
|
|
Assert.That(Thread.ThreadState.V27, Is.EqualTo(UnicornEmu.Q[27]));
|
|
|
|
Assert.That(Thread.ThreadState.V28, Is.EqualTo(UnicornEmu.Q[28]));
|
|
|
|
Assert.That(Thread.ThreadState.V29, Is.EqualTo(UnicornEmu.Q[29]));
|
|
|
|
Assert.That(Thread.ThreadState.V30, Is.EqualTo(UnicornEmu.Q[30]));
|
|
|
|
Assert.That(Thread.ThreadState.V31, Is.EqualTo(UnicornEmu.Q[31]));
|
|
|
|
Assert.That(Thread.ThreadState.V31, Is.EqualTo(UnicornEmu.Q[31]));
|
2018-09-08 13:23:07 -04:00
|
|
|
|
|
|
|
Assert.That(Thread.ThreadState.Fpcr, Is.EqualTo(UnicornEmu.Fpcr));
|
|
|
|
Assert.That(Thread.ThreadState.Fpsr & (int)FpsrMask, Is.EqualTo(UnicornEmu.Fpsr & (int)FpsrMask));
|
|
|
|
|
2018-09-01 10:24:05 -04:00
|
|
|
Assert.That(Thread.ThreadState.Overflow, Is.EqualTo(UnicornEmu.OverflowFlag));
|
2018-09-08 13:23:07 -04:00
|
|
|
Assert.That(Thread.ThreadState.Carry, Is.EqualTo(UnicornEmu.CarryFlag));
|
|
|
|
Assert.That(Thread.ThreadState.Zero, Is.EqualTo(UnicornEmu.ZeroFlag));
|
2018-09-01 10:24:05 -04:00
|
|
|
Assert.That(Thread.ThreadState.Negative, Is.EqualTo(UnicornEmu.NegativeFlag));
|
|
|
|
}
|
|
|
|
|
2018-10-05 21:45:59 -04:00
|
|
|
private void ManageFpSkips(FpSkips FpSkips)
|
|
|
|
{
|
|
|
|
if (FpSkips.HasFlag(FpSkips.IfNaN_S))
|
|
|
|
{
|
|
|
|
if (float.IsNaN(VectorExtractSingle(UnicornEmu.Q[0], (byte)0)))
|
|
|
|
{
|
|
|
|
Assert.Ignore("NaN test.");
|
|
|
|
}
|
|
|
|
}
|
|
|
|
else if (FpSkips.HasFlag(FpSkips.IfNaN_D))
|
|
|
|
{
|
|
|
|
if (double.IsNaN(VectorExtractDouble(UnicornEmu.Q[0], (byte)0)))
|
|
|
|
{
|
|
|
|
Assert.Ignore("NaN test.");
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
if (FpSkips.HasFlag(FpSkips.IfUnderflow))
|
|
|
|
{
|
|
|
|
if ((UnicornEmu.Fpsr & (int)FPSR.UFC) != 0)
|
|
|
|
{
|
|
|
|
Assert.Ignore("Underflow test.");
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
if (FpSkips.HasFlag(FpSkips.IfOverflow))
|
|
|
|
{
|
|
|
|
if ((UnicornEmu.Fpsr & (int)FPSR.OFC) != 0)
|
|
|
|
{
|
|
|
|
Assert.Ignore("Overflow test.");
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
private void ManageFpTolerances(FpTolerances FpTolerances)
|
|
|
|
{
|
|
|
|
if (!Is.EqualTo(UnicornEmu.Q[0]).ApplyTo(Thread.ThreadState.V0).IsSuccess)
|
|
|
|
{
|
|
|
|
if (FpTolerances == FpTolerances.UpToOneUlps_S)
|
|
|
|
{
|
|
|
|
if (IsNormalOrSubnormal_S(VectorExtractSingle(UnicornEmu.Q[0], (byte)0)) &&
|
|
|
|
IsNormalOrSubnormal_S(VectorExtractSingle(Thread.ThreadState.V0, (byte)0)))
|
|
|
|
{
|
|
|
|
Assert.That (VectorExtractSingle(Thread.ThreadState.V0, (byte)0),
|
|
|
|
Is.EqualTo(VectorExtractSingle(UnicornEmu.Q[0], (byte)0)).Within(1).Ulps);
|
|
|
|
Assert.That (VectorExtractSingle(Thread.ThreadState.V0, (byte)1),
|
|
|
|
Is.EqualTo(VectorExtractSingle(UnicornEmu.Q[0], (byte)1)).Within(1).Ulps);
|
|
|
|
Assert.That (VectorExtractSingle(Thread.ThreadState.V0, (byte)2),
|
|
|
|
Is.EqualTo(VectorExtractSingle(UnicornEmu.Q[0], (byte)2)).Within(1).Ulps);
|
|
|
|
Assert.That (VectorExtractSingle(Thread.ThreadState.V0, (byte)3),
|
|
|
|
Is.EqualTo(VectorExtractSingle(UnicornEmu.Q[0], (byte)3)).Within(1).Ulps);
|
|
|
|
|
|
|
|
Console.WriteLine(FpTolerances);
|
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
|
|
|
Assert.That(Thread.ThreadState.V0, Is.EqualTo(UnicornEmu.Q[0]));
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
if (FpTolerances == FpTolerances.UpToOneUlps_D)
|
|
|
|
{
|
|
|
|
if (IsNormalOrSubnormal_D(VectorExtractDouble(UnicornEmu.Q[0], (byte)0)) &&
|
|
|
|
IsNormalOrSubnormal_D(VectorExtractDouble(Thread.ThreadState.V0, (byte)0)))
|
|
|
|
{
|
|
|
|
Assert.That (VectorExtractDouble(Thread.ThreadState.V0, (byte)0),
|
|
|
|
Is.EqualTo(VectorExtractDouble(UnicornEmu.Q[0], (byte)0)).Within(1).Ulps);
|
|
|
|
Assert.That (VectorExtractDouble(Thread.ThreadState.V0, (byte)1),
|
|
|
|
Is.EqualTo(VectorExtractDouble(UnicornEmu.Q[0], (byte)1)).Within(1).Ulps);
|
|
|
|
|
|
|
|
Console.WriteLine(FpTolerances);
|
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
|
|
|
Assert.That(Thread.ThreadState.V0, Is.EqualTo(UnicornEmu.Q[0]));
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
bool IsNormalOrSubnormal_S(float f) => float.IsNormal(f) || float.IsSubnormal(f);
|
|
|
|
|
|
|
|
bool IsNormalOrSubnormal_D(double d) => double.IsNormal(d) || double.IsSubnormal(d);
|
|
|
|
}
|
|
|
|
|
2018-06-30 11:40:41 -04:00
|
|
|
protected static Vector128<float> MakeVectorE0(double E0)
|
2018-05-11 19:10:27 -04:00
|
|
|
{
|
2018-08-27 02:44:01 -04:00
|
|
|
if (!Sse2.IsSupported)
|
|
|
|
{
|
|
|
|
throw new PlatformNotSupportedException();
|
|
|
|
}
|
|
|
|
|
2018-06-30 11:40:41 -04:00
|
|
|
return Sse.StaticCast<long, float>(Sse2.SetVector128(0, BitConverter.DoubleToInt64Bits(E0)));
|
Add Sse Opt. for Cmeq_V_2D, Cmgt_V_2D (Reg). Add Sse Opt. for Crc32cb, Crc32ch, Crc32cw, Crc32cx. Add 10 simple tests for Fcmgt, Fcmge, Fcmeq, Fcmle, Fcmlt (S, V) (Reg, Zero). Add 2 Cnt_V tests. (#183)
* Add files via upload
* Add files via upload
* Add files via upload
* CPE
* Add EmitSse42Crc32()
* Update CpuTestSimdCmp.cs
* Update Pseudocode.cs
* Update Instructions.cs
* Update CpuTestSimd.cs
* Update Instructions.cs
2018-06-25 21:32:29 -04:00
|
|
|
}
|
2018-05-11 19:10:27 -04:00
|
|
|
|
2018-06-30 11:40:41 -04:00
|
|
|
protected static Vector128<float> MakeVectorE0E1(double E0, double E1)
|
Add Sse Opt. for Cmeq_V_2D, Cmgt_V_2D (Reg). Add Sse Opt. for Crc32cb, Crc32ch, Crc32cw, Crc32cx. Add 10 simple tests for Fcmgt, Fcmge, Fcmeq, Fcmle, Fcmlt (S, V) (Reg, Zero). Add 2 Cnt_V tests. (#183)
* Add files via upload
* Add files via upload
* Add files via upload
* CPE
* Add EmitSse42Crc32()
* Update CpuTestSimdCmp.cs
* Update Pseudocode.cs
* Update Instructions.cs
* Update CpuTestSimd.cs
* Update Instructions.cs
2018-06-25 21:32:29 -04:00
|
|
|
{
|
2018-08-27 02:44:01 -04:00
|
|
|
if (!Sse2.IsSupported)
|
|
|
|
{
|
|
|
|
throw new PlatformNotSupportedException();
|
|
|
|
}
|
|
|
|
|
|
|
|
return Sse.StaticCast<long, float>(
|
|
|
|
Sse2.SetVector128(BitConverter.DoubleToInt64Bits(E1), BitConverter.DoubleToInt64Bits(E0)));
|
Add Sse Opt. for Cmeq_V_2D, Cmgt_V_2D (Reg). Add Sse Opt. for Crc32cb, Crc32ch, Crc32cw, Crc32cx. Add 10 simple tests for Fcmgt, Fcmge, Fcmeq, Fcmle, Fcmlt (S, V) (Reg, Zero). Add 2 Cnt_V tests. (#183)
* Add files via upload
* Add files via upload
* Add files via upload
* CPE
* Add EmitSse42Crc32()
* Update CpuTestSimdCmp.cs
* Update Pseudocode.cs
* Update Instructions.cs
* Update CpuTestSimd.cs
* Update Instructions.cs
2018-06-25 21:32:29 -04:00
|
|
|
}
|
|
|
|
|
2018-06-30 11:40:41 -04:00
|
|
|
protected static Vector128<float> MakeVectorE1(double E1)
|
Add Sse Opt. for Cmeq_V_2D, Cmgt_V_2D (Reg). Add Sse Opt. for Crc32cb, Crc32ch, Crc32cw, Crc32cx. Add 10 simple tests for Fcmgt, Fcmge, Fcmeq, Fcmle, Fcmlt (S, V) (Reg, Zero). Add 2 Cnt_V tests. (#183)
* Add files via upload
* Add files via upload
* Add files via upload
* CPE
* Add EmitSse42Crc32()
* Update CpuTestSimdCmp.cs
* Update Pseudocode.cs
* Update Instructions.cs
* Update CpuTestSimd.cs
* Update Instructions.cs
2018-06-25 21:32:29 -04:00
|
|
|
{
|
2018-08-27 02:44:01 -04:00
|
|
|
if (!Sse2.IsSupported)
|
|
|
|
{
|
|
|
|
throw new PlatformNotSupportedException();
|
|
|
|
}
|
|
|
|
|
2018-06-30 11:40:41 -04:00
|
|
|
return Sse.StaticCast<long, float>(Sse2.SetVector128(BitConverter.DoubleToInt64Bits(E1), 0));
|
2018-05-11 19:10:27 -04:00
|
|
|
}
|
|
|
|
|
2018-09-17 00:54:05 -04:00
|
|
|
protected static float VectorExtractSingle(Vector128<float> Vector, byte Index)
|
|
|
|
{
|
|
|
|
if (!Sse41.IsSupported)
|
|
|
|
{
|
|
|
|
throw new PlatformNotSupportedException();
|
|
|
|
}
|
|
|
|
|
|
|
|
int Value = Sse41.Extract(Sse.StaticCast<float, int>(Vector), Index);
|
|
|
|
|
|
|
|
return BitConverter.Int32BitsToSingle(Value);
|
|
|
|
}
|
|
|
|
|
Add Sse Opt. for Cmeq_V_2D, Cmgt_V_2D (Reg). Add Sse Opt. for Crc32cb, Crc32ch, Crc32cw, Crc32cx. Add 10 simple tests for Fcmgt, Fcmge, Fcmeq, Fcmle, Fcmlt (S, V) (Reg, Zero). Add 2 Cnt_V tests. (#183)
* Add files via upload
* Add files via upload
* Add files via upload
* CPE
* Add EmitSse42Crc32()
* Update CpuTestSimdCmp.cs
* Update Pseudocode.cs
* Update Instructions.cs
* Update CpuTestSimd.cs
* Update Instructions.cs
2018-06-25 21:32:29 -04:00
|
|
|
protected static double VectorExtractDouble(Vector128<float> Vector, byte Index)
|
2018-05-11 19:10:27 -04:00
|
|
|
{
|
2018-08-27 02:44:01 -04:00
|
|
|
if (!Sse41.IsSupported)
|
|
|
|
{
|
|
|
|
throw new PlatformNotSupportedException();
|
|
|
|
}
|
|
|
|
|
Add Sse Opt. for Cmeq_V_2D, Cmgt_V_2D (Reg). Add Sse Opt. for Crc32cb, Crc32ch, Crc32cw, Crc32cx. Add 10 simple tests for Fcmgt, Fcmge, Fcmeq, Fcmle, Fcmlt (S, V) (Reg, Zero). Add 2 Cnt_V tests. (#183)
* Add files via upload
* Add files via upload
* Add files via upload
* CPE
* Add EmitSse42Crc32()
* Update CpuTestSimdCmp.cs
* Update Pseudocode.cs
* Update Instructions.cs
* Update CpuTestSimd.cs
* Update Instructions.cs
2018-06-25 21:32:29 -04:00
|
|
|
long Value = Sse41.Extract(Sse.StaticCast<float, long>(Vector), Index);
|
|
|
|
|
|
|
|
return BitConverter.Int64BitsToDouble(Value);
|
2018-05-11 19:10:27 -04:00
|
|
|
}
|
|
|
|
|
2018-06-30 11:40:41 -04:00
|
|
|
protected static Vector128<float> MakeVectorE0(ulong E0)
|
2018-05-11 19:10:27 -04:00
|
|
|
{
|
2018-08-27 02:44:01 -04:00
|
|
|
if (!Sse2.IsSupported)
|
|
|
|
{
|
|
|
|
throw new PlatformNotSupportedException();
|
|
|
|
}
|
|
|
|
|
2018-06-30 11:40:41 -04:00
|
|
|
return Sse.StaticCast<ulong, float>(Sse2.SetVector128(0, E0));
|
2018-05-11 19:10:27 -04:00
|
|
|
}
|
|
|
|
|
2018-06-30 11:40:41 -04:00
|
|
|
protected static Vector128<float> MakeVectorE0E1(ulong E0, ulong E1)
|
2018-05-11 19:10:27 -04:00
|
|
|
{
|
2018-08-27 02:44:01 -04:00
|
|
|
if (!Sse2.IsSupported)
|
|
|
|
{
|
|
|
|
throw new PlatformNotSupportedException();
|
|
|
|
}
|
|
|
|
|
2018-06-30 11:40:41 -04:00
|
|
|
return Sse.StaticCast<ulong, float>(Sse2.SetVector128(E1, E0));
|
2018-05-11 19:10:27 -04:00
|
|
|
}
|
|
|
|
|
2018-06-30 11:40:41 -04:00
|
|
|
protected static Vector128<float> MakeVectorE1(ulong E1)
|
2018-05-11 19:10:27 -04:00
|
|
|
{
|
2018-08-27 02:44:01 -04:00
|
|
|
if (!Sse2.IsSupported)
|
|
|
|
{
|
|
|
|
throw new PlatformNotSupportedException();
|
|
|
|
}
|
|
|
|
|
2018-06-30 11:40:41 -04:00
|
|
|
return Sse.StaticCast<ulong, float>(Sse2.SetVector128(E1, 0));
|
2018-05-11 19:10:27 -04:00
|
|
|
}
|
|
|
|
|
|
|
|
protected static ulong GetVectorE0(Vector128<float> Vector)
|
|
|
|
{
|
2018-08-27 02:44:01 -04:00
|
|
|
if (!Sse41.IsSupported)
|
|
|
|
{
|
|
|
|
throw new PlatformNotSupportedException();
|
|
|
|
}
|
|
|
|
|
2018-06-30 11:40:41 -04:00
|
|
|
return Sse41.Extract(Sse.StaticCast<float, ulong>(Vector), (byte)0);
|
2018-05-11 19:10:27 -04:00
|
|
|
}
|
|
|
|
|
|
|
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protected static ulong GetVectorE1(Vector128<float> Vector)
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{
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2018-08-27 02:44:01 -04:00
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if (!Sse41.IsSupported)
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|
|
{
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|
throw new PlatformNotSupportedException();
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}
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2018-06-30 11:40:41 -04:00
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return Sse41.Extract(Sse.StaticCast<float, ulong>(Vector), (byte)1);
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2018-05-11 19:10:27 -04:00
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}
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2018-09-17 00:54:05 -04:00
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2018-10-23 10:12:45 -04:00
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protected static ushort GenNormal_H()
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|
|
{
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uint Rnd;
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do Rnd = TestContext.CurrentContext.Random.NextUShort();
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while (( Rnd & 0x7C00u) == 0u ||
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(~Rnd & 0x7C00u) == 0u);
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return (ushort)Rnd;
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|
}
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|
protected static ushort GenSubnormal_H()
|
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|
|
{
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|
|
|
uint Rnd;
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|
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|
|
do Rnd = TestContext.CurrentContext.Random.NextUShort();
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|
|
while ((Rnd & 0x03FFu) == 0u);
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|
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|
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|
|
return (ushort)(Rnd & 0x83FFu);
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|
|
}
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|
2018-09-17 00:54:05 -04:00
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|
|
protected static uint GenNormal_S()
|
|
|
|
{
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|
|
|
uint Rnd;
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|
2018-10-05 21:45:59 -04:00
|
|
|
do Rnd = TestContext.CurrentContext.Random.NextUInt();
|
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|
|
while (( Rnd & 0x7F800000u) == 0u ||
|
|
|
|
(~Rnd & 0x7F800000u) == 0u);
|
2018-09-17 00:54:05 -04:00
|
|
|
|
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|
|
return Rnd;
|
|
|
|
}
|
|
|
|
|
2018-10-05 21:45:59 -04:00
|
|
|
protected static uint GenSubnormal_S()
|
2018-09-17 00:54:05 -04:00
|
|
|
{
|
|
|
|
uint Rnd;
|
|
|
|
|
|
|
|
do Rnd = TestContext.CurrentContext.Random.NextUInt();
|
|
|
|
while ((Rnd & 0x007FFFFFu) == 0u);
|
|
|
|
|
|
|
|
return Rnd & 0x807FFFFFu;
|
|
|
|
}
|
|
|
|
|
|
|
|
protected static ulong GenNormal_D()
|
|
|
|
{
|
|
|
|
ulong Rnd;
|
|
|
|
|
2018-10-05 21:45:59 -04:00
|
|
|
do Rnd = TestContext.CurrentContext.Random.NextULong();
|
|
|
|
while (( Rnd & 0x7FF0000000000000ul) == 0ul ||
|
|
|
|
(~Rnd & 0x7FF0000000000000ul) == 0ul);
|
2018-09-17 00:54:05 -04:00
|
|
|
|
|
|
|
return Rnd;
|
|
|
|
}
|
|
|
|
|
2018-10-05 21:45:59 -04:00
|
|
|
protected static ulong GenSubnormal_D()
|
2018-09-17 00:54:05 -04:00
|
|
|
{
|
|
|
|
ulong Rnd;
|
|
|
|
|
|
|
|
do Rnd = TestContext.CurrentContext.Random.NextULong();
|
|
|
|
while ((Rnd & 0x000FFFFFFFFFFFFFul) == 0ul);
|
|
|
|
|
|
|
|
return Rnd & 0x800FFFFFFFFFFFFFul;
|
|
|
|
}
|
2018-02-15 19:04:38 -05:00
|
|
|
}
|
|
|
|
}
|